參數(shù)資料
型號: TVP5031PFP
廠商: TEXAS INSTRUMENTS INC
元件分類: 顏色信號轉(zhuǎn)換
英文描述: COLOR SIGNAL DECODER, PQFP80
封裝: POWER, PLASTIC, TQFP-80
文件頁數(shù): 71/92頁
文件大?。?/td> 415K
代理商: TVP5031PFP
2–57
2.11.48 Sync Pattern Register
Address
A3h
7
6
5
4
3
2
1
0
Framing Code [7:0]
If the custom sync bit is set in the control register, the sync comparator uses the contents of the sync pattern register
as the bit pattern for the teletext framing code. Otherwise, the default sync patterns are used. Relative to the sync
pattern register, incoming bits are shifted in MSB first. To illustrate; the default WST framing code would be specified
as 0xE4 and the default NABTS framing code would be specified as 0xE7 (although the MSB vs LSB is ambiguous
for the latter).
NOTE:The custom sync option is only valid for NABTS or WST messages; closed caption
always uses the EIA standard start bit pattern.
2.11.49 Teletext FIFO
Address
B0h
7
6
5
4
3
2
1
0
Teletext Data FIFO [7:0]
The teletext FIFO can be accessed via the regular teletext FIFO register at address B0h if PHI or I2C host interface
is enabled or via VIP FIFO A at location 4 in VIP FIFO address space if VIP host interface is enabled.
Reading this location returns 1 byte from the FIFO that stores teletext transactions. If the FIFO is empty, a read returns
the same value as the previous read. It is the driver software’s or application software’s responsibility to assure that
the correct number of bytes per transaction are read out from the teletext FIFO. The transaction length depends on
whether the data is NABTS, WST-NTSC, or WST-PAL.
2.11.50 Closed Caption Data
Address
B2h
7
6
5
4
3
2
1
0
Closed Caption Data [7:0]
The closed caption data contains two bytes per transaction. To retrieve both bytes this register must be read twice.
The first read returns the first byte of the message; the second read returns the second byte. Further reads return
the first byte until new data is received.
In order to distinguish between closed caption data received in the odd and even fields, software can test the field
sequence status bit (Address 82h, bit 4).
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