參數(shù)資料
型號(hào)： TVP3020-175
廠商： Texas Instruments, Inc.
英文描述： Video Interface PALETTE(視頻接口調(diào)色器)
中文描述： 視頻接口盒（視頻接口調(diào)色器）
文件頁(yè)數(shù)： 47/98頁(yè)
文件大小： 582K
代理商： TVP3020-175
2–33
2.9.3
An ID register with a hardwired code is provided that can be used as a software verification for different
versions of the system design. The ID code in the Viewpoint palette is static and may be read without
consideration to the dot clock or video signals. The ID code is read through the indirect register map (see
Table 2–2).
Identification Code
The value defined for the palette is 20 (hex).
2.10 General-Purpose I/O Register and Terminals
A general-purpose I/O register and output terminals are defined that provide a means of controlling external
functions such as phase-locked loops (PLLs) through the Viewpoint microinterface. The 8-bit
general-purpose I/O data register has five of its bit locations (D0–D4) tied to external I/O terminals
(I/O0–I/O4). The other three bits (D5–D7) can be used for general data storage and do not affect any other
circuitry. The general-purpose I/O is controlled by the general-purpose I/O control register. G.P. I/O control
register bits IOC0–IOC4 control whether the corresponding general-purpose I/O terminals are configured
as inputs or outputs. The reset default condition is for G.P. I/O control register bits IOC0–IOC4 = logic 0,
which configures terminals I/O0–I/O4 as inputs. If any of the GPI/O control register bits are set to a logic
1, the corresponding I/O terminals are configured as outputs.
As mentioned before, this general-purpose I/O can be used to control external functions; i.e., serial
programming of an external PLL through the Viewpoint microinterface.
The general-purpose I/O control register, data register, and terminal relationships are shown in the following
table.
DATA BIT
D7
D6
D5
D4
D3
D2
D1
D0
General-Purpose I/O Control Register
X
X
X
IOC4
IOC3
IOC2
IOC1
IOC0
General-Purpose I/O Data Register
X
X
X
D4
D3
D2
D1
D0
General-Purpose I/O Pin Location
I/O4
I/O3
I/O2
I/O1
I/O0
2.11 Reset
There are two ways to reset the Viewpoint palette:
1.
2.
Hardware reset
Software reset
2.11.1
When the RESET input is held low, all Viewpoint registers go to the default state. This reset is asynchronous,
and any glitch on this terminal could change the intended register setup. The default state at reset is VGA
mode.
Hardware Reset
2.11.2
When the reset register [FF (hex) on the indirect register map] is written to, all other registers are initialized
to VGA default settings accordingly. Any data may be written into the reset register to cause this reset to
occur.
Software Reset
NOTE:
The default register settings are detailed in Tables 2–1 and 2–2.
If reset is desired at power up, an external resistor, capacitor, and diode network
should be connected to RESET. See Figure A–1 for a typical circuit.
If TTL logic is employed to provide the signal to the RESET terminal, a pullup
resistor should be used.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
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TVP3020-175MDN 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette
TVP3020-175PCE 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette
TVP3020-200MDN 制造商:Rochester Electronics LLC 功能描述:- Bulk
TVP3020-200PCE 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC)
TVP3020-220MDN 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette
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