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參數(shù)資料
| 型號： | TVP3020-175 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Video Interface PALETTE(視頻接口調(diào)色器) |
| 中文描述： | 視頻接口盒（視頻接口調(diào)色器） |
| 文件頁數(shù)： | 11/98頁 |
| 文件大?。?/td> | 582K |
| 代理商： | TVP3020-175 |
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1–5
1.4
Ordering Information
TVP3020
– XXX
XXX
Pixel Clock Frequency Indicator
MUST CONTAIN THREE CHARACTERS:
–135:135-MHz pixel clock
–175:175-MHz pixel clock
–200:200-MHz pixel clock
Package
MUST CONTAIN THREE LETTERS:
MDN: Metal, Quad Flat Pack
PCE:
Plastic, Quad Flat Pack (mechanical data unavailable at time of print)
1.5
Terminal Functions
PIN
I/O
DESCRIPTION
NAME
AVDD
CLK0
NO.
74, 76
Analog power. All AVDD terminals must be connected.
Dot clock 0 input. CLK0 can be selected to drive the dot clock at
frequencies up to 140 MHz. When VGA mode is active, the default clock
source is CLK0. The maximum frequency in VGA mode is 85 MHz.
96
I
(TTL
compatible)
CLK1
97
I
(TTL
compatible)
Dot clock 1 input. CLK1 can be selected to drive the dot clock at
frequencies up to 140 MHz.
CLK2, CLK2
98, 99
I
(TTL/ECL
compatible)
Dual-mode dot clock input. These inputs are essentially ECL-
compatible inputs, but two TTL clocks may be used on the CLK2 and
CLK2 if so selected in the input clock select register. These inputs may
be selected as the dot clock up to the device limit while in the ECL mode
or up to 140 MHz in the TTL mode.
COMP
71
I
Compensation. COMP provides compensation for the internal
reference amplifier. A 0.1-
μ
F ceramic capacitor is required between this
terminal and AVDD. The COMP capacitor must be as close to the device
as possible to avoid noise pick up.
DVDD
16, 39,59,
107, 123, 129,
132, 134
Digital power. All DVDD terminals must be connected.
D0–D7
41–48
I/O
(TTL
compatible)
MPU interface data bus. These terminals are used to transfer data in
and out of the register map and palette/overlay RAM.
FS ADJUST
70
I
Full-scale adjustment. A resistor connected between this terminal and
ground controls the full-scale range of the DACs.
GND
15, 40, 60, 63,
65, 67, 69, 73,
75, 108, 122,
128, 131
Ground. All GND terminals must be connected. The GNDs are
connected internally.
NOTE: All unused inputs should be tied to a logic level and not be allowed to float.
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PDF描述 |
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| TVP3020-135 | Video Interface PALETTE(視頻接口調(diào)色器) |
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| TVP3025-175 | Video Interface PALETTE(三PLL，視頻接口調(diào)色器) |
| TVP3030-175 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器) |
| TVP3030-220 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TVP3020-175MDN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3020-175PCE | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3020-200MDN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TVP3020-200PCE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| TVP3020-220MDN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
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