參數(shù)資料
型號: tua 4401
廠商: SIEMENS AG
英文描述: FM Car Radio IC with PLL(FM車載電臺芯片(帶鎖相環(huán)))
中文描述: 汽車調(diào)頻收音機(jī)芯片(調(diào)頻車載電臺芯片(帶鎖相環(huán))與鎖相環(huán))
文件頁數(shù): 14/32頁
文件大?。?/td> 618K
代理商: TUA 4401
Specification
TUA 4401
Semiconductor Group
15
1.6.99
8
Circuit Description
The TUA 4401 is a one chip FM car radio system consisting of RF frontend, gain adjustable IF
amplifier, FM-IF limiter amplifier, demodulator, PLL synthesizer, IF counter for STS and ADC’s for
fieldstrength and multipath detector.The serial bus is switchable between I
2
C and 3 Wire bus mode.
8.1
FM frontend
The frontend consists of a two pin varactor tuned oscillator, a double balanced mixer and a prestage
AGC control circuit. The mixer has an improved intermodulation behaviour and convertes the RF
signal to the 10,7 MHz IF range. Two inputs allow both symmetrical and unsymmetrical operation.
The integrated AGC stage for prestage control drives MOSFETS as well as PIN diodes with current
drivers for normal and inverse polarity. The AGC threshold can be set with aserial bus controlled
2 Bit DAC.
8.2
FM IF amplifier
After the mixer an IF amplifier is present for IF post amplification. Input and output impedance are
both 330 Ohms for matching with ceramic filters. For adjusting the over all gain the IF amplifier gain
can be adjusted with a serial bus controlled 4 Bit DAC. The DAC output is available at a pin and can
be overwritten by an external control voltage for a not bus controlled gain adjust.
8.3
FM limiter and demodulator
The FM IF amplifier includes a seven stage capacitive coupled limiter amplifier and a fieldstrength
generator with high linearity and increased dynamic range.
The coincidence demodulator has an additional AFC short loop circuit with integrated varactor
diode in parallel to the external tank circuit to improve the distortion bahaviour in case of detuning.
For decreasing noise a soft mute circuit is available. Noise can be continueasly decreased
controlled by the fieldstrength value. Mute depth is adjustable with a serial bus controlled 7 bit DAC.
The adjustment range includes a full mute feature.
8.4
Multipath detector
A multipath detector with analog output is available. Its input signal is fed through a 200 kHz 2nd
order highpass filter and a 80 kHz 1st order highpass filter.
8.5
A/D converter for fieldstrength and multipath detector
The 7 bit A/D converter has two input channels and works as successive approximation converter.
The conversion time for both input signals is t = 32
μ
s. The 7-bit digital-words from both channels
(14 bit) are read out together via bus into two bytes with the read subadress 82H.
The input voltage range for both channels is 0...VREFD5V.
8.6
IF counter and multipath/fieldstrength evaluation for STS
FM center frequencies ar available in two ranges set by bit D7 in subaddress 05H.
For D7=1 the range of centerfrequency is 20.800 MHz...22.3875 MHz in 128 steps (12.5 kHz
per step). For D7=0 the range of centerfrequency is 10.400 MHz...11.1937 MHz in 128 steps
(6.25 kHz per step).
The gate time is adjustable in 8 steps from 320us...40.96ms and the tolerance of the accepted
count value, the window is adjustable in 5 steps from +/- (6.25kHz...100kHz) for D7=0 in sub-
address 05H and +/- (12.5 kHz...200 kHz) for D7=1 in subaddress 05H. The results IF_CENT
and IF_WINDOW are read out via bus (read-subadress 82H) or pin IF_CENT.
If the IF frequency is into the preselected window, IF_CENT goes from high to low level.
If the IF frequency is outside the preselected window, IF_CENT is high. The bit IF_WINDOW
is a hint IF-frequency that is to low (IF_WINDOW=high) or is to high (IF_WINDOW=low).
In addition to the frequency measurement, thresholds for multipath and fieldstrength voltages can
be programmed via bus (subaddress 0BH). IF_CENT will only go to low level in case of field-
strength and multipath voltages are beyond the thresholds and the frequency is inside the window.
When setting the thresholds to zero multipath and fieldstrength evaluation is disabled.
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