
Rev. B - July 29, 1999
1
TSS901E
Intelligent and Flexible IEEE 1355 communication
controller for space
Description and Applications
The TSS901E provides an interface between a Data-
Strobe link - according to the IEEE Std 1355-1995
specification
carrying
a
simple
interprocessor
communication protocol - and a data processing node
consisting of a CPU and a communication and data
memory.
The TSS901E offers hardware supported execution of
the major parts of the interprocessor communication
protocol: data transfer between two nodes of a multi-
processor system is performed with minimal host CPU
intervention.
The
TSS901E
can
execute
simple
commands to provide basic features for system control
functions; a provision of fault tolerant features exists as
well.
Although the TSS901E initial exploitation is for use in
multi-processor systems where the high speed links
standardisation is an important issue and where reliability
is a requirement, it could be used in applications such
as heterogeneous systems or modules without any
communication feature like special image compression
chips, some signal processors, application specific
programmable logic or mass memory.
The TSS901E may also be used in single board systems
where standardised high speed interfaces are needed and
systems containing "non-intelligent" modules such as A/
D-converter or sensor interfaces which can be assembled
with the TSS901E thanks to the "control by link" feature.
Features
q
3 identical bidirectional link channels allowing full
duplex communication under selectable transmit rate
from 1.25 up to 200 Mbit/s in each direction
q
a
COmmunication
Memory
Interface
(COMI)
provides autonomous accesses to a communication
memory which are controlled by an arbitration unit,
allowing two TSS901E to share one Dual Port Ram
without external arbitration
q
the scalable databus width (8/16/32 bit) allows
flexible integration with any CPU type
q
little or big endian mode is configurable
q
a HOst Control Interface (HOCI) gives read/write
accesses to the TSS901E configuration registers and
to the DS-link channels for the controlling CPU
q
device control via one of the three links allows its
use in systems without a local controller
q
link disconnect detection and parity check at token
(data
and
control)
level;
possible
checksum
generation for packet level check
q
power saving mode relying on automatic transmit
rate reduction
q
a user’s manual of the TSS901E (also called
SMCS332) is available at:
http://www.omimo.be/companies/dasa_000.htm
The information contained herein is subject to change without notice.
No responsibility is assumed by Atmel Wireless & Microcontrollers
for using this publication and/or circuits described herein : nor for
any possible infringements of patents or other rights of third parties
which may result from its use.