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  • 參數資料
    型號: TSPC106AVGU83CE
    英文描述: MEMORY CONTROLLER
    中文描述: 內存控制器
    文件頁數: 5/40頁
    文件大?。?/td> 569K
    代理商: TSPC106AVGU83CE
    5
    TSPC106
    2102B
    HIREL
    02/02
    Figure 3.
    Pin Assignments Shading Ley
    Pinout
    NC
    VSS
    No connect
    Power Supply Ground
    VDD
    AVDD
    Power Supply Positive
    Clock Power Supply Positive (K9)
    Signals
    VIEW
    Table 1.
    TSPC106 Pinout in 303-ball CBGA Package
    Signal Name
    Pin Number
    Active
    I/O
    60x Processor Interface Signals
    A[0:31]
    R2, P2, N2, M2, L2, K2, J5, K4, K5, K6, J2, J6, J3, J4, H3, H4, H2,
    G2, F1, E1, E2, F4, E3, D1, C1, C2, B1, C3, B2, E4, D3, E5
    High
    I/O
    AACK
    D2
    Low
    I/O
    ARTRY
    F2
    Low
    I/O
    BG0
    K3
    Low
    Output
    BG1 (DIRTY_OUT)
    R4
    Low
    Output
    BG2 (TWE)
    R5
    Low
    Output
    BG3 (DCS)
    T1
    Low
    Output
    BR0
    L3
    Low
    Input
    BR1 (DIRTY_IN)
    T3
    Low
    Input
    BR2 (TV)
    T6
    Low
    Input
    BR3 (BA0)
    T5
    Low
    Input
    CI
    N3
    Low
    I/O
    DBG0
    L5
    Low
    Output
    DBG1 (TOE)
    U4
    Low
    Output
    DBG2 (DWE0)
    P3
    Low
    Output
    DBG3 (DWE1)
    H11
    Low
    Output
    DBGLB (CKE)
    J10
    Low
    Output
    DH[0:31]
    T14, R13, R14, P13, P14, N13, U3, W1, V2, W2, V3, W3, V4, W4,
    V5, W5, V6, W6, V7, W7, V8, W8, N8, W9, V9, W10, V10, W11, V11,
    W12, V12, W13
    High
    I/O
    DL[0:31]
    U6, T7, U7, T8, U8, R8, P8, N9, P9, R9, U9, T9, U10, T10, U13, T13,
    R12, N14, M13, T2, U1, U2, V1, U15, V16, U14, W16, V15, W15,
    V14, W14, V13
    High
    I/O
    GBL
    M3
    Low
    I/O
    LBCLAIM
    N4
    Low
    Input
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