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參數(shù)資料
| 型號： | TS(X)PC932VTDU/T |
| 元件分類： | 時鐘及定時 |
| 英文描述： | PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | PLASTIC, TQFP-32 |
| 文件頁數(shù)： | 9/13頁 |
| 文件大?。?/td> | 103K |
| 代理商： | TS(X)PC932VTDU/T |
TSPC932
5/13
3. ELECTRICAL CHARACTERISTICS
3.1. DC CHARACTERISTICS (TC = –55
°C to 125°C, Vcc = 3.3V 5%)
Parameter
Symbol
Comments
Min.
Typ.
Max.
Unit
Input HIGH Voltage
VIH
2.0
3.6
V
Input LOW Voltage
VIL
0.8
V
Output HIGH Voltage
VOH
IOH=–20mA (Note 1.)
2.4
V
Output LOW Voltage
VOL
IOL=+20mA (Note 1.)
0.5V
V
Input Current
IIN
Note 2.
120
mA
Maximum Core Supply Current
Icc
100
mA
Maximum PLL Supply Current
ICCPLL
15
20
mA
Maximum Output Buffers Supply Current
ICCO
150
mA
Input Capacitance
CIN
4
pF
Output Capacitance
CPD
Per output
25
pF
Note 1: The TSPC932 outputs can drive series or parallel terminated 50
W (or 50W to VCC/2) transmission lines on the incident edge
(see Applications Information section).
Note 2: Inputs have pull–up/pull–down resistors which affect current.
3.2. PLL INPUT REFERENCE CHARACTERISTICS (TC = –55
°C to 125°C, Vcc = 3.3V 5%)
Parameter
Symbol
Comments
Min.
Max.
Unit
TCLK Input Rise/Fall Time
tr,tf
3.0
ns
Reference Input Frequency
fref
Note 3.
MHz
Reference Input Duty Cycle
frefDC
25
75
Note 3: Minimum and Maximum input reference frequency is limited by the VCO lock range and feedback divider.
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