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參數(shù)資料
| 型號(hào)： | TS(X)PC932VTDU/T |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | PLASTIC, TQFP-32 |
| 文件頁數(shù)： | 12/13頁 |
| 文件大?。?/td> | 103K |
| 代理商： | TS(X)PC932VTDU/T |
TSPC932
8/13
4.3. Output Shut–Down pins
TSPC932 provides 6 shut–downs to disable a single or multiple parts of a system.
Qn
SDn
4.4. Power Supply Filtering
The TSPC932 is a mixed analog/digital product and as such it exhibits some sensitivities that would not necessarily be seen on a fully
digital product. Analog circuitry is naturally susceptible to random noise, especially if this noise is seen on power supply pins. The
TSPC932 provides separate power supplies for the output buffers (VCCO) and the internal PLL (VCCA) of the device. The purpose of
this design technique is to try to isolate the high switching noise digital outputs from the relatively sensitive internal analog phase–
locked loop.In a controlled environment such as an evaluation board this level of isolation is sufficient. However, in a digital system
environment where it is more difficult to minimize noise on the power supplies, a second level of isolation may be required. The sim-
plest form of isolation is a power supply filter on the VCCA pin.
3.3V
VCCA
VCC
10pF
22mF
10pF
R=10–15
W
The TSPC932 is most susceptible to noise with spectral content in the 1kHz to 1MHz range. Therefore the filter should be designed to
target this range. The key parameter that needs to be met in the final filter is the DC voltage drop that will be seen between the Vcc
supply and the VCCA pin of the TSPC932. From the datasheet, the current sourced through the VCCA pin is typically 15mA (20mA
maximum). Assuming that a minimum of 3.0V must be maintained on the VCCA pin, very little DC voltage drop can be tolerated when
a 3.3V power supply is used. The resistor shown in figure above must have a resistance of 10 to 15
W to meet the voltage drop criteria.
The RC filter pictured will provide a broadband filter with approximately 100:1 attenuation for noise whose spectral content is above
20kHz. As the noise frequency crosses the series resonant point of an individual capacitor, its overall performance begins to look
inductive and thus increases with increasing frequency. The parallel capacitor combination shown ensures that a low impedance
path to ground exists for frequencies well above the bandwidth of the PLL
Although the TSPC932 has several design features to minimize the susceptibility to power supply noise (isolated power and grounds
and fully differential PLL), there still may be applications in which overall performance is being degraded due to system power supply
noise. The power supply filter scheme discussed in this section should be adequate to eliminate power supply noise related problems
in most designs.
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