參數(shù)資料
型號(hào): TRF1121_07
廠商: Texas Instruments, Inc.
英文描述: Dual VCO/PLL Synthesizer With IF Up-Converter
中文描述: 雙的VCO / PLL頻率合成器與中頻直至轉(zhuǎn)換器
文件頁(yè)數(shù): 16/27頁(yè)
文件大?。?/td> 1356K
代理商: TRF1121_07
www.ti.com
Phase Noise
TRF1121
TRF1221
SLWS170A–APRIL 2005–REVISED DECEMBER 2005
The TRF1121 / TRF1221 achieve superior phase noise performance with on-chip resonators and varactors. It is
designed to meet the phase noise requirements of both single-carrier and multi-carrier systems. Due to the chip
architecture, the phase noise and spurious performance of the LO1 PLL is about 15 dB better than the LO2 PLL.
The typical phase noise of the TRF1121 and TRF1221 S-band PLL (LO2) with the PLL locked is shown in
Figure 15
and
Figure 16
respectively. The phase noise plots of the TRF1221 S-band PLL at the min and max
range are shown in
Figure 20
and
Figure 21
respectively. These plots were taken at room temperature and
typical voltage conditions.
Figure 15. TRF1121 Typical Integrated LO1 (S-band) Phase Noise is 0.35 rms (100 Hz to 1 MHz)
When designing full duplex radios that employ narrow T to R spacing, one must consider impact of wide-band
phase noise since it can degrade Rx sensitivity. (See Application Note TDB).
Figure 17
shows typical wide-band
composite phase noise performance of the combination of the two integrated PLLs. At 50-MHz offset typical
performance is –145 dBc/Hz.
16
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