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參數(shù)資料
| 型號： | TPS9125PW |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS |
| 中文描述： | 5伏/ 3伏SIM卡供應(yīng)及電平轉(zhuǎn)換器 |
| 文件頁數(shù)： | 6/24頁 |
| 文件大?。?/td> | 338K |
| 代理商： | TPS9125PW |
TPS9125
5 V/3 V SIMSUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating junction temperature range, V
DD
= 3 V,
C
VCAP1/2
= 220 nF
±
20%; C
SIMVCC
= 1
μ
F
±
20%; SIMPWR = 1 (unless otherwise noted)
voltage generator charge pump (SIMVCC)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Output voltage at SIMVCC, 5-V mode
2.7 V < VDD < 3.3 V,
fSIMCLK = 0 MHz,
2.7 V < VDD < 3.3 V,
MODE = 1
ISIMVCC = 10 mA,
MODE = 0 (default value)
4.5
5.5
V
Output voltage at SIMVCC, 3-V mode
ISIMVCC = 6 mA,
VDD–50 mV
VDD–50 mV
V
Output current at SIMVCC, 5-V mode
(see Note 1)
2.7 V < VDD < 3.3 V
10
mA
Output current at SIMVCC, 3-V mode
(see Note 1)
2.7 V < VDD < 3.3 V
6
MA
Switching frequency (internal oscillator
frequency)
440
800
1160
kHz
Output ripple
5-V mode,
Iout = 10 mA
100
mV
Startup time
Standby to 5-V mode
1
ms
Power efficiency
ISIMVCC = 10 mA
82.5%
NOTE 1: The SIM supply circuit is designed according to the GSM specification 11.11 and 11.12 and complies to the requirements of GSM test
specification 11.10. For more information, please see application section.
level shifters (see Note 2)
PARAMETER
TEST CONDITIONS
5-V mode
MIN
TYP
MAX
UNIT
Clock frequency CLK/SIMCLK
1
5
MHz
3-V mode
1
4
Clock duty cycle on SIMCLK
5-V mode and 3-V mode,
CLK input 50% duty cycle
40%
50%
60%
Output load, driver side
70
100
pF
Data rate on DATA/SIMDATA
Clk/372
Clk/32
MHz
Residual voltage at SIMRST, SIMCLK, SIMDATA in powerdown mode
NOTE 2: The level shifters are designed according to the GSM specification 11.11 and 11.12.
SIMPWR = 0, I = 8
μ
A
–0.4
0.4
V
logic inputs (CLK, MODE, RESET, RST, SIMPWR) (see Note 3)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIH
VIL
High-level input voltage
0.7
×
VDD
V
Low-level input voltage
0.3
×
VDD
10
V
Input capacitance
pF
Input current
–20
–10
1
Input leakage current
VIN = 0.5 V to 3 V
–1
1
NOTE 3: For each state VIH, VIL, a positive current is defined as flowing out of the TSP9125.
logic output SIMCLK in 3-V mode (according to GSM 11.12) (see Note 4)
PARAMETER
TEST CONDITIONS
IOHmax = 20
μ
A
IOLmax = –20
μ
A
Cin = Cout = 100 pF
MIN
TYP
MAX
UNIT
VOH
High-level output voltage
0.7
×
SIMVCC
0
SIMVCC
0.2
×
SIMVCC
50
V
Low-level output voltage
V
Rise/fall time SIMCLK (see Note 5)
ns
NOTES:
4. For each state VOH, VOL, a positive current is defined as flowing out of the TSP9125.
5. To allow for overshoot the voltage on SIMCLK should remain between –0.3 V and SIMVCC+0.3 V during dynamic operations.
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