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參數(shù)資料
| 型號： | TPS9125PW |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS |
| 中文描述： | 5伏/ 3伏SIM卡供應(yīng)及電平轉(zhuǎn)換器 |
| 文件頁數(shù)： | 16/24頁 |
| 文件大小： | 338K |
| 代理商： | TPS9125PW |
TPS9125
5 V/3 V SIMSUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
16
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
output capacitor C2 (continued)
Increasing the value of the capacitor C2 will increase the time the charge pump is disabled. The power
consumption of the charge pump will be reduced, because the active time in which switching losses occur is
shorter. However, a larger value of C2 also results in a longer start-up time for the 5-V supply. Based on the
above considerations a 1
μ
F capacitor is recommended for C2.
pump capacitor C1
The value of pump capacitor C1 has a big impact on the start-up time of the charge pump: this is the time needed
to charge the output capacitor C2 from 0 V up to 5 V. The recommended value for capacitor C1 is 220 nF, thus
ensuring a start-up time of less than 1ms. If a lower value for capacitor C1 is chosen, the start-up time will
increase.
input capacitor
During the activation time of the charge pump there are steep current slopes of about 40 mA on the supply input
V
DD
. Therefore, it is recommended to use a low ESR 1
μ
F capacitor, such as a multilayer ceramic or tantalum
capacitor, on the V
DD
terminal.
capacitor selection
The exact capacitance value of the capacitors used is not as critical as the use of high quality and low ESR
(equivalent serial resistance) capacitors, such as multilayer ceramic or tantalum capacitors.
The ESR of C1 causes a voltage drop during charging and discharging, and this degrades the performance of
the charge pump. Low ESR is most critical for the choice of capacitor C1, because the charge current of this
capacitor is twice as much as the load current and the current through output capacitor C2. If a tantalum
capacitor is used for C1, the positive terminal should be connected to VCAP1.
The ESR of output capacitor C2 increases the ripple on SIMVCC. The ESR of C2 has only a minor influence,
because the ripple on SIMVCC in the TSP9125 is fixed at maximum 100 mV, due to the two-point regulation
scheme used. If a tantalum capacitor is used for C2, the positive terminal should be connected to SIMVCC.
pulsed output current
To comply with GSM test specification 11.10, paragraph 27.17.2.1.2, the SIMVCC supply voltage must stay
above the minimum allowed voltage level when spikes in the current consumption of the card occur. For a 5-V
SIM card interface, those spikes are up to a maximum charge of 40nAs. To test for this requirement, current
pulses of maximum 400 ns duration and maximum 200 mA amplitude are drawn from SIMVCC. For a 3-V SIM
card interface, those spikes are up to a maximum 12 mA charge. To test for this requirement, current pulses
of maximum 400ns duration and maximum 60-mA amplitude are drawn from SIMVCC.
In 5-V mode (MODE = 0), SIMV
CC
must stay above 4.5 V, in 3-V mode (MODE = 1), it must stay above 2.7 V.
Because the TSP9125 charge pump itself is too slow to counteract these peaks, the correct combination of
capacitors on SIMVCC must be chosen to cope with these requirements. In addition to the 1
μ
F
±
20% low ESR
ceramic capacitor used to buffer the SIMVCC output, it is recommended to connect a 100 nF ceramic capacitor
as close as possible to the contacting elements.
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