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參數(shù)資料
| 型號(hào)： | TPS9103PW |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | POWER SUPPLY FOR GaAs POWER AMPLIFIERS |
| 中文描述： | 電源供應(yīng)器的GaAs功率放大器 |
| 文件頁數(shù)： | 5/22頁 |
| 文件大?。?/td> | 341K |
| 代理商： | TPS9103PW |
TPS9103
POWER SUPPLY FOR GaAs POWER AMPLIFIERS
SLVS131A – OCTOBER 1995 – REVISED JULY 1996
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description
high-side switch and driver (BATT_IN, BATT_OUT, SW_EN)
The high-side switch is a p-channel MOSFET with a maximum on-state resistance of 180 m
(V
I(BATT_IN)
= 6 V and V
CC
= 3.3 V). The driver pulls the gate of the high-side switch to GATE_BIAS instead of
ground to reduce the MOSFET on-state resistance. Gate breakdown considerations limit the voltage between
BATT_IN and GATE_BIAS to 15 V. Extremely fast switching times are not required in this application, and the
high-side switch/driver is designed to provide 2
μ
s maximum switching times with minimum power consumption.
The GaAs depletion-mode MOSFETs in the PA are protected from damage at power-up by internal logic that
inhibits the driver until negative gate bias is available. The control input SW_EN is compatible with 3-V and 5-V
CMOS logic; a logic-high input turns the high-side switch on.
oscillator (OSC_EN, CLK)
The internal oscillator drives the charge pump at 50 kHz with a nominal duty cycle of 50% when both the EN
and OSC_EN inputs are logic lows. CLK outputs the internal oscillator signal (no buffer). A logic-high input to
OSC_EN disables the internal oscillator and allows the charge pump to operate from an external clock
connected to CLK. When an external clock with negative overshoot is applied, a Schottky diode must be added
to limit the amplitude of the overshoot.
charge pump (GATE_BIAS, C1+, C1–)
The inverting charge pump generates the negative gate-bias voltage output at GATE_BIAS.
chip enable (EN)
A logic high on EN shuts down the internal functions of the TPS9103 and turns the bias system off, reducing
the supply current to less than 10
μ
A. A low input on EN causes normal operation to resume.
power good (PG, PGP)
PG output is logic high when GATE_BIAS is in regulation. PG output is logic low when GATE_BIAS is not in
regulation. The high-side switch is disabled and PG is forced to logic low whenever the magnitude of
GATE_BIAS is less than 0.6
×
V
DD
. A modified threshold for the power-good function can be achieved by
programming PGP with an external resistor.
undervoltage lockout for V
CC
and V
DD
(UVLO and UVDLO)
Undervoltage lockout prevents operation at supply voltages too low for proper operation. When UVLO or
UVDLO is active, all power-switch drives are forced to the off state and bias is removed from unneeded
functions. Hysteresis is provided to minimize cycling on and off because of source impedance loading when the
supply voltage is close to the threshold.
buffered clock output (BCLK)
The buffered clock output is a driver for an external charge pump. When the optional external charge pump is
not needed, BCLK should be left unconnected. For more details, see the application section.
supply input for inverting charge pump (V
DD
)
V
DD
is the supply voltage for the inverting charge pump. In normal operation, V
DD
is connected to V
CC
. If the
negative gate-bias needs to be larger than V
CC
(i.e., more negative), then a higher voltage supply needs to be
connected to V
DD
. This can be supplied from an external charge pump driven from BCLK.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| TPS9103PWR | 制造商:Rochester Electronics LLC 功能描述:POWER SUPPLY FOR GAAS POWER AMPLIFIERS - Bulk |
| TPS9103Y | 制造商:TI 制造商全稱:Texas Instruments 功能描述:POWER SUPPLY FOR GaAs POWER AMPLIFIERS |
| TPS9104 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:CELLULAR SUBSCRIBER TERMINAL POWER SUPPLY/AUDIO SYSTEM |
| TPS9104IPT | 制造商:Rochester Electronics LLC 功能描述:LINBICMOS CELLULAR POWER SUPPLY/AUDIO SY - Tape and Reel |
| TPS9104IPTR | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
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