參數(shù)資料
型號: TPS799XXDDC
廠商: Texas Instruments, Inc.
英文描述: 200mA, Low Quiescent Current, Ultra-Low Noise, High PSRR Low Dropout Linear Regulator
中文描述: 200mA的,低靜態(tài)電流,超低噪聲,高PSRR低壓降線性穩(wěn)壓器
文件頁數(shù): 2/21頁
文件大?。?/td> 453K
代理商: TPS799XXDDC
www.ti.com
ABSOLUTE MAXIMUM RATINGS
Over operating temperature range (unless otherwise noted)
(1)
DISSIPATION RATINGS
TPS799xx
SBVS056G–JANUARY 2005–REVISED AUGUST 2006
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
ORDERING INFORMATION
(1)
PRODUCT
TPS799
xx
yyyz
V
OUT(2)
XX
is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable).
(3)
YYY
is package designator.
Z
is package quantity.
(1)
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
website at
www.ti.com
.
Output voltages from 1.2V to 4.5V in 50mV increments are available through the use of innovative factory EEPROM programming;
minimum order quantities may apply. Contact factory for details and availability.
For fixed 1.2V operation, tie FB to OUT.
(2)
(3)
PARAMETER
V
IN
range
V
EN
range
V
OUT
range
Peak output current
Continuous total power dissipation
Junction temperature range, T
J
Storage junction temperature range , T
STG
ESD rating, HBM
ESD rating, CDM
TPS799xx
–0.3 to +7.0
–0.3 to V
IN
+0.3
–0.3 to V
IN
+0.3
Internally limited
See Dissipation Ratings Table
–55 to +150
–55 to +150
2
500
UNIT
V
V
V
°
C
°
C
kV
V
(1)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
DERATING FACTOR
ABOVE T
A
= 25
°
C
3.6mW/
°
C
5.0mW/
°
C
3.9mW/
°
C
5.3mW/
°
C
7.1mW/
°
C
15.4mW/
°
C
BOARD
Low-K
(1)
High-K
(2)
Low-K
(1)
High-K
(2)
Low-K
(1)
High-K
(2)
PACKAGE
DDC
DDC
YZU
YZU
DRV
DRV
R
θ
JC
90
°
C/W
90
°
C/W
27
°
C/W
27
°
C/W
20
°
C/W
20
°
C/W
R
θ
JA
280
°
C/W
200
°
C/W
255
°
C/W
190
°
C/W
140
°
C/W
65
°
C/W
T
A
< 25
°
C
360mW
500mW
390mW
530mW
715mW
1540mW
T
A
= 70
°
C
200mW
275mW
215mW
295mW
395mW
845mW
T
A
= 85
°
C
145mW
200mW
155mW
215mW
285mW
615mW
(1)
(2)
The JEDEC low-K (1s) board used to derive this data was a 3in
×
3in, two-layer board with 2-ounce copper traces on top of the board.
The JEDEC high-K (2s2p) board used to derive this data was a 3in
×
3in, multilayer board with 1-ounce internal power and ground
planes and 2-ounce copper traces on top and bottom of the board.
2
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