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APPLICATION INFORMATION
GND
EN
NR
IN
OUT
V
IN
V
OUT
0.01
μ
F
2.2
μ
F
TPS786xx
1 
μ
F
Board Layout Recommendation to Improve
PSRR and Noise Performance
To improve ac measurements like PSRR, output
noise, and transient response, it is recommended that
the board be designed with separate ground planes
for V
IN
and V
OUT
, with each ground plane connected
only at the ground pin of the device. In addition, the
ground connection for the bypass capacitor should
connect directly to the ground pin of the device.
External Capacitor Requirements
A 2.2-μF or larger ceramic input bypass capacitor,
connected between IN and GND and located close to
the TPS786xx, is required for stability and improves
transient response, noise rejection, and ripple rejec-
tion. A higher-value input capacitor may be necessary
if large, fast-rise-time load transients are anticipated
and the device is located several inches from the
power source.
Regulator Mounting
The tab of the SOT223-6 package is electrically
connected to ground. For best thermal performance,
the tab of the surface-mount version should be
soldered directly to a circuit-board copper area.
Increasing the copper area improves heat dissipation.
TPS78601, TPS78618
TPS78625, TPS78628
TPS78630, TPS78633
SLVS389D–SEPTEMBER 2002–REVISED OCTOBER 2004
flow out of the NR pin must be at a minimum,
because any leakage current creates an IR drop
across the internal resistor, thus creating an output
error. Therefore, the bypass capacitor must have
minimal
leakage
current.
should be no more than 0.1-μf to ensure that it is fully
charged during the quickstart time provided by the
internal switch shown in the functional block diagram.
The TPS786xx family of low-dropout (LDO) regulators
has been optimized for use in noise-sensitive equip-
ment. The device features extremely low dropout
voltages, high PSRR, ultralow output noise, low
quiescent current (265 μA typically), and enable input
to reduce supply currents to less than 1 μA when the
regulator is turned off.
The
bypass
capacitor
A typical application circuit is shown in Figure 24.
For example, the TPS78630 exhibits only 48 μV
RMS
of output voltage noise using a 0.1-μF ceramic
bypass capacitor and a 10-μF ceramic output capaci-
tor. Note that the output starts up slower as the
bypass capacitance increases due to the RC time
constant at the bypass pin that is created by the
internal 250-k
 resistor and external capacitor.
Figure 24. Typical Application Circuit
Like most low dropout regulators, the TPS786xx
requires an output capacitor connected between OUT
and GND to stabilize the internal control loop. The
minimum recommended capacitance is 1 μF. Any 1
μF or larger ceramic capacitor is suitable.
The internal voltage reference is a key source of
noise in an LDO regulator. The TPS786xx has an NR
pin which is connected to the voltage reference
through a 250-k
 internal resistor. The 250-k
internal resistor, in conjunction with an external by-
pass capacitor connected to the NR pin, creates a
low pass filter to reduce the voltage reference noise
and, therefore, the noise at the regulator output. In
order for the regulator to operate properly, the current
Solder pad footprint recommendations for the devices
are presented in an application bulletin
 Solder Pad
Recommendations for Surface-Mount Devices
, litera-
ture number AB-132, available from the TI web site
(www.ti.com).
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