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參數(shù)資料
| 型號： | TPS65124RGT |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | SINGLE-INDUCTOR QUADRUPLE-OUTPUT TFT LCD POWER SUPPLY |
| 中文描述： | 單電感翻兩番，輸出TFT LCD電源 |
| 文件頁數(shù)： | 5/23頁 |
| 文件大?。?/td> | 706K |
| 代理商： | TPS65124RGT |
www.ti.com
TPS65120, TPS65121, TPS65123, TPS65124
SLVS531–JUNE 2004
ELECTRICAL CHARACTERISTICS (continued)
V
IN
= 3.6 V, EN = RUN = V
IN
, L = 10 μH, T
A
= -40
°
C to 85
°
C, typical values are at T
A
= 25
°
C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
LINEAR REGULATOR STAGE - AUXILIARY OUTPUT
V
LDOIN
Input voltage range
2.5
5.8
V
V
LDOIN
V
LDOOUT
Output voltage range
1.8
V
I
LDOOUT
I
SC_LDO
Maximum output current
Short-circuit current limit
Minimum dropout voltage
20
mA
mA
mV
V
LDOOUT
= 0 V
I
LDOOUT
= 10 mA
2.5 V
≤
V
LDOIN
≤
5.5 V,
0 mA
≤
I
LDOOUT
≤
20 mA
I
LDOOUT
= 0 to 20 mA
V
= V
LDOOUT
+ 0.5 V (min 2.5 V)
to 5.5 V, I
LDOOUT
= 20 mA
V
LDOIN
= V
LDOOUT
+ 0.4 V (min 2.5 V),
T
A
°
C
GATE = VIN
50
400
Total accuracy
±
3%
Load regulation
0.006
%/mA
Line regulation
0.013
%/V
I
Q_LDO
Linear regulator quiescent current
11
20
μA
I
SD_LDO
GATE DRIVER
Linear regulator shutdown current
0.2
1
μA
Gate output pull-down resistance
Gate output pull-up resistance
High level input voltage
Low level input voltage
UNDERVOLTAGE LOCKOUT
V
UVLO
Undervoltage lockout threshold
LOGIC SIGNALS EN, RUN, ENVGL, ENVGH
V
IH
High level input voltage
V
IL
Low level input voltage
V
GATE
< 500 mV
100
100
k
k
V
V
V
IH
V
IL
1.4
0.4
V
IN
falling
2.15
2.3
V
1.4
V
V
0.4
0.1
0.1
ENVGL, ENVGH = V
IN
or GND (TPS65124)
EN, RUN = V
IN
EN, RUN
≤
0.4 v
0.01
0.01
100
I
LKG
Logic input leakage current
μA
EN, RUN pin pull-down resistance
k
5
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