
www.ti.com
DETAILED DESCRIPTION
Controller Circuit
Synchronous Rectifier
Device Enable
Undervoltage Lockout
Softstart
Power Good
SLVS431B – JUNE 2002 – REVISED JANUARY 2008
The controller circuit of the device is based on a fixed frequency multiple feedforward controller topology. Input
voltage, output voltage, and voltage drop on the NMOS switch are monitored and forwarded to the regulator. So
changes in the operating conditions of the converter directly affect the duty cycle and must not take the indirect
and slow way through the control loop and the error amplifier. The control loop, determined by the error amplifier,
only has to handle small signal errors. The input for it is the feedback voltage on the FB pin or, at fixed output
voltage versions, the voltage on the internal resistor divider. It is compared with the internal reference voltage to
generate an accurate and stable output voltage.
The peak current of the NMOS switch is also sensed to limit the maximum current flowing through the switch and
the inductor. The typical peak current limit is set to 1300 mA. An internal temperature sensor prevents the device
from getting overheated in case of excessive power dissipation.
The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier.
Because the commonly used discrete Schottky rectifier is replaced with a low RDS(ON) PMOS switch, the power
conversion efficiency reaches 90%. To avoid ground shift due to the high currents in the NMOS switch, two
separate ground pins are used. The reference for all control functions is the GND pin. The source of the NMOS
switch is connected to PGND. Both grounds must be connected on the PCB at only one point close to the GND
pin. Due to the nature of the SEPIC topology, there is no dc path from the battery to the output. No additional
components must be added in a SEPIC or Flyback topology to make sure the battery is disconnected from the
output of the converter.
Nevertheless, the backgate diode of the high-side PMOS which is forward biased in standard operation, is turned
off in shutdown. This is done by a special circuit which takes the cathode of the backgate diode of the high-side
PMOS and disconnects it from the source when the regulator is not enabled (EN = low).
The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In
shutdown mode, the regulator stops switching, all internal control circuitry including the low-battery comparator is
switched off, and the backgate diode of the rectifying switch is turned off (as described in the Synchronous
Rectifier Section). This also means that the output voltage can drop below the input voltage during shutdown.
During start-up of the converter, the duty cycle and the peak current are limited in order to avoid high peak
currents drawn from the battery.
An undervoltage lockout function prevents device start-up if the supply voltage on VBAT is lower than
approximately 1.6 V. When in operation and the battery is being discharged, the device automatically enters the
shutdown mode if the voltage on VBAT drops below approximately 1.6 V. This undervoltage lockout function is
implemented in order to prevent the malfunctioning of the converter.
When the SEPIC section is enabled, the internal startup cycle starts with switching at a duty cycle of 50%. After
the output voltage has reached approximately 1.4V the device continues switching with a variable duty cycle.
Until the programmed output voltage is reached, the main switch current limit is set to 40% of its nominal value to
avoid high peak inrush currents at the battery during startup. Also the maximum output power during output short
circuit conditions is reduced. When the programmed output voltage is reached, the regulator takes control and
the switch current limit is set back to 100%.
The PGOOD pin stays high impedance when the dc/dc converter delivers an output voltage within a defined
voltage window. So it can be used to enable any connected circuitry such as cascaded converters (LDO) or
microprocessor circuits.
14
Copyright 2002–2008, Texas Instruments Incorporated