參數(shù)資料
型號： TPS54429ERSAT
廠商： TEXAS INSTRUMENTS INC
元件分類： 穩(wěn)壓器
英文描述： 0.01 A SWITCHING REGULATOR, PQCC16
封裝： PLASTIC, QFN-16
文件頁數(shù)： 25/26頁
文件大小： 907K
代理商： TPS54429ERSAT
SLVSAS0 –FEBRUARY 2011
The TPS54429E contains a unique circuit to prevent current from being pulled from the output during startup if
the output is pre-biased. When the soft-start commands a voltage higher than the pre-bias level (internal soft
start becomes greater than feedback voltage VFB), the controller slowly activates synchronous rectification by
starting the first low side FET gate driver pulses with a narrow on-time. It then increments that on-time on a
cycle-by-cycle basis until it coincides with the time dictated by (1-D), where D is the duty cycle of the converter.
This scheme prevents the initial sinking of the pre-bias output, and ensure that the out voltage (VO) starts and
ramps up smoothly into regulation and the control loop is given time to transition from pre-biased start-up to
normal mode operation.
Power Good
The TPS54429E has power-good open drain output. The power good function is activated after soft start has
finished. The power good function becomes active after 1.7 times soft-start time. When the output voltage is
within -10% of the target value, internal comparators detect power good state and the power good signal
becomes high. If the PG output is pulled up to VREG5, the resister value, which is connected between PG and
VREG5, must be in the range of 20k ohm to 150k ohm. If the feedback voltage goes under 15% of the target
value, the power good signal becomes low after a 5 μs internal delay.
VREG5
VREG5 is an internally generated voltage source used by the TPS54429E. It is derived directly from the input
voltage and is nominally regulated to 5.5 V when the input voltage is above 5.6 V. The output of the VREG5
regulator is the input to the internal UVLO function. VREG5 must be above the UVLO wake up threshold voltage
(3.8 V typical) for the TPS54429E to function. Connect a 1.0 F capacitor between pin 3 of the TPS54429E and
power ground for proper regulation of the VREG5 output. The VREG5 output voltage is available for external use
and can typically source up to 70 mA. The VREG5 output is disabled when the TPS54429E EN pin is open or
pulled low.
Output Discharge Control
TPS54429E discharges the output when EN is low, or the controller is turned off by the protection functions
(OVP, UVP, UVLO and thermal shutdown). The output is discharged by an internal 50- MOSFET which is
connected from VO to PGND. The internal low-side MOSFET is not turned on during the output discharge
operation to avoid the possibility of causing negative voltage at the output.
Current Protection
The output overcurrent protection (OCP) is implemented using a cycle-by-cycle valley detect control circuit. The
switch current is monitored by measuring the low-side FET switch voltage between the SW pin and GND. This
voltage is proportional to the switch current. To improve accuracy, the voltage sensing is temperature
compensated.
During the on-time of the high-side FET switch, the switch current increases at a linear rate determined by VIN,
VOUT, the on-time, and the output inductor value. During the on-time of the low-side FET switch, this current
decreases linearly. The average value of the switch current is the load current IOUT. If the measured voltage is
above the voltage proportional to the current limit, the device constantly monitors the low-side FET switch
voltage, which is proportional to the switch current, during the low-side on-time. The converter maintains the
low-side switch on until the measured voltage is below the voltage corresponding to the current limit at which
time the switching cycle is terminated and a new switching cycle begins. In subsequent switching cycles, the
on-time is set to a fixed value and the current is monitored in the same manner.
There are some important considerations for this type of overcurrent protection. The load current one half of the
peak-to-peak inductor current higher than the overcurrent threshold. Also when the current is being limited, the
output voltage tends to fall as the demanded load current may be higher than the current available from the
converter. This may cause the output under-voltage protection circuit to be activated. When the overcurrent
condition is removed, the output voltage will return to the regulated value. This protection is non-latching.
8
2011, Texas Instruments Incorporated
Product Folder Link(s) :TPS54429E
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TPS54429EVM-608 功能描述:電源管理IC開發(fā)工具 TPS54429 Eval Mod RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V
TPS54429PWP 功能描述:直流/直流開關(guān)調(diào)節(jié)器 7V-18Vin,4.5A Sync Step-Down DCAP2 Mode RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5
TPS54429PWPR 功能描述:直流/直流開關(guān)調(diào)節(jié)器 7V-18Vin,4.5A Sync Step-Down DCAP2 Mode RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5
TPS54478 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.95-V to 6-V Input, 4-A Output, 2-MHz, Synchronous Step-Down
TPS54478EVM-037 功能描述:電源管理IC開發(fā)工具 TPS54478 Eval Mod RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V
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