參數(shù)資料
型號: TPS2346PWRG4
廠商: Texas Instruments
文件頁數(shù): 8/30頁
文件大?。?/td> 490K
描述: IC HOT SWAP POWER MGR 24-TSSOP
標(biāo)準(zhǔn)包裝: 2,000
類型: 熱交換控制器
應(yīng)用: 光纖學(xué)網(wǎng)絡(luò)(ONET)
內(nèi)部開關(guān):
電源電壓: -5.2V,3.3V,5V,5.15V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 帶卷 (TR)
TPS2346
 
SLUS529  MAY 2002
8
www.ti.com
functional overview (continued)
As each back-end voltage is ramped, its level is validated to ensure it is within the established UV and OV
tolerances at the expiration of a programmable time period, protecting against start-up into faulted loads. The
same capacitor at the IRAMP pin which sets the current ramp rate is also used to establish this ramp-up time
limit. If all four supplies successfully reach a known good state, the PG
 output signal is pulled low to allow
enumeration of the add-in card.
To protect the backplane power bus, the TPS2346 provides an electronic circuit breaker that trips upon detecting
an overcurrent event. The detection threshold of an overcurrent event is internally set to approximately two
times (2x) IMAX. The 5.2-V channel also includes a circuit breaker function; its trip threshold is always a
minimum of 50 mV above the current-limit sense voltage. If any channel trips the circuit breaker, all supply
outputs are rapidly turned off, and remain latched off. Also, the PG
 output becomes high-impedance. The
TPS2346 can be reset by cycling either the ENABLE
 input or power to the device.
The low, 20-mV (150 mV on the 5.2-V channel) nominal sense voltage limit allows the use of low-value sense
resistors, or for high-current applications, the use of PC board copper trace. This helps minimize the insertion
loss across the hot swap interface. Further insertion loss reduction is achieved via the on-chip charge pump,
which ensures maximum gate overdrive on each of the three external pass MOSFETs on the positive supply
channels. This feature helps users obtain lower R
DS(on)
  characteristics with their preferred N-channel
MOSFETs.
Under a normal PC board shutdown event, the TPS2346 also turns off power in a controlled manner. To initiate
a shutdown, ENABLE
 is brought to a logic high during a healthy supply state (outputs on and no faults present).
The supply outputs are then sequentially ramped off in the reverse order of the ramp-up sequence. After all
supply outputs are off, the TPS2346 goes into a low-current sleep mode.
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