參數(shù)資料
型號： TPIC43T01DA
廠商： Texas Instruments, Inc.
英文描述： THREE-PHASE BRUSHLESS MOTOR RPM CONTROLLERS
中文描述： 三相無刷電機轉(zhuǎn)速控制器
文件頁數(shù)： 6/27頁
文件大?。?/td> 376K
代理商： TPIC43T01DA
TPIC43T01, TPIC43T02
THREE-PHASE BRUSHLESS MOTOR RPMCONTROLLERS
SLIS098 – APRIL 2000
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics, T
C
= 25
°
C, V
CC
= 24V (unless otherwise noted) (continued)
charge pump
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VO(CP)
Output voltage
IO = –1.5 mA, VCC = 18 V to 28 V,
CP = 0.01
μ
F, CS = 0.1
μ
F,
S/S = high
VCC + 14
VCC + 15
VCC + 17
V
IO = –1.5 mA, VCC = 8 V,
CP = 0.01
μ
F, CS = 0.1
μ
F,
S/S = high
VCC + 5.5
V
V(CP–uvlo)
Under voltage lockout
IO = –1.5 mA, VCC = 8 V to 28 V,
S/S = high (VCP forced externally)
VCC + 5
VCC + 6
VCC + 7
V
Vhys(CP)
Under voltage lockout hysteresis
IO = –1.5 mA, VCC = 8 V to 28 V,
S/S = high (VCP forced externally)
0.6
V
FG signal conditioning
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIO(FG)
IIB(FG)
Amplifier input offset voltage
Measured at FGOUT
0.5
±
7
±
1
mV
μ
A
Amplifier input bias current
Measured at FGIN–
I(FG) = –200
μ
A,
IDD = 0
I(FG) = 200
μ
A, IDD = 0
0.02
VOH(FG)
Amplifier high level output voltage
VDD–500 mV
VDD–350 mV
V
VOL(FG)
AV
V(FGsens)
V(FGbias)
Amplifier low level output voltage
100
500
mV
Amplifier open-loop gain (see Note 2)
45
dB
FG input sensitivity (see Note 2)
100 x Gain, at 2 kHz,
IFG = 0
μ
A, IDD = 0
FGOUT with respect to
V(FGIN+), See Figure 8
FGOUT with respect to
V(FGIN+), See Figure 8
IO = 2 mA
VO = 5 V
3
mV
FG bias voltage
2.375
2.5
2.625
V
VIT+(FGOUT)
FG comparator positive threshold
215
250
285
mV
VIO(FGOUT)
FG comparator offset voltage
0.8
±
7
mV
VOL(FGSOUT)
Ilkg(FGSOUT)
NOTE 2: Design target only. Not tested in production.
FGSOUT open drain saturation voltage
0.4
0.7
V
FGSOUT leakage current
0.08
10
μ
A
Hall sensor signal conditioning
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
μ
A
IIB(HL)
VICR(HL)
Input bias current (see Note 2)
±
4
Common-mode input voltage range (see Note 3)
1.5
3.5
V
VIT+(HL)
Input positive threshold voltage
With respect to V(CM), 1.5 k
in series
with both inputs, See Figure 9
4
8
12
mV
VIT–(HL)
Input negative threshold voltage
With respect to VCM, 1.5 k
in series
with both inputs, See Figure 9
–4
–8
–12
mV
NOTES:
2. Design target only. Not tested in production.
3. Not measured, forced during testing.
FG reference crystal oscillator
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIT+(OSC1)
VIT–(OSC1)
NOTES:
OSC1 input upper threshold (see Note 3)
2.7
V
OSC1 input lower threshold (see Note 3)
1
V
3. Not measured, forced during testing.
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