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參數資料
| 型號： | TPA6140A2YFFT |
| 廠商： | Texas Instruments |
| 文件頁數： | 11/30頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP AUDIO 25MW STER 16DSBGA |
| 視頻文件： | TPA6140A2 Demonstration |
| 特色產品： | TPA6140A2 Class G DirectPath? Stereo Headphone Amplifier |
| 標準包裝： | 1 |
| 系列： | DirectPath™ |
| 類型： | G 類 |
| 輸出類型： | 耳機，2-通道（立體聲） |
| 在某負載時最大輸出功率 x 通道數量： | 32mW x 2 @ 32 歐姆 |
| 電源電壓： | 2.5 V ~ 5.5 V |
| 特點： | 消除爆音，差分輸入，I²C，靜音，短路和熱保護，關機，音量控制 |
| 安裝類型： | 表面貼裝 |
| 供應商設備封裝： | 16-DSBGA（1.56x1.56） |
| 封裝/外殼： | 16-UFBGA，DSBGA |
| 包裝： | 標準包裝 |
| 產品目錄頁面： | 878 (CN2011-ZH PDF) |
| 配用： | 296-24299-ND - EVALUATION MODULE FOR TPA6140A2 |
| 其它名稱： | 296-24303-6 |
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www.ti.com................................................................................................................................................. SLOS598A – MARCH 2009 – REVISED OCTOBER 2009
POWER SUPPLY AND HPVDD DECOUPLING CAPACITORS AND CONNECTIONS
The TPA6140A2 DirectPath headphone amplifier requires adequate power supply decoupling to ensure that
output noise and total harmonic distortion (THD) remain low. Use good low equivalent-series-resistance (ESR)
ceramic capacitors (X5R material or better is required for best performance). Place a 2.2
μF capacitor within
5 mm of the AVDD pin. Reducing the distance between the decoupling capacitor and AVDD minimizes parasitic
inductance and resistance, improving TPA6140A2 supply rejection performance. Use 0402 or smaller size
capacitors if possible. Ensure that the ground connection of each of the capacitors has a minimum length return
path to the device. Failure to properly decouple the TPA6140A2 may degrade audio or EMC performance.
For additional supply rejection, connect an additional 10
μF or higher value capacitor between AVDD and
ground. This will help filter lower frequency power supply noise. The high power supply rejection ratio (PSRR) of
the TPA6140A2 makes the 10
μF capacitor unnecessary in most applications.
Connect a 2.2
μF capacitor between HPVDD and ground. This ensures the amplifier internal bias supply remains
stable and maximizes headphone amplifier performance.
DO NOT connect HPVDD directly to AVDD or an external supply voltage. The
voltage at HPVDD is generated internally. Connecting HPVDD to an external
voltage can damage the device.
LAYOUT RECOMMENDATIONS
GND CONNECTIONS
The SGND pin is an input reference and must be connected to the headphone ground connector pin. This
ensures no turn-on pop and minimizes output offset voltage. Do not connect more than ±0.3 V to SGND.
AGND is a power ground. Connect supply decoupling capacitors for AVDD, HPVDD, and HPVSS to AGND.
GENERAL I
2C OPERATION
The I2C bus employs two signals, SDA (data) and SCL (clock), to communicate between integrated circuits in a
system. The bus transfers data serially one bit at a time. The address and data 8-bit bytes are transferred most
significant bit (MSB) first. In addition, each byte transferred on the bus is acknowledged by the receiving device
with an acknowledge bit. Each transfer operation begins with the master device driving a start condition on the
bus and ends with the master device driving a stop condition on the bus. The bus uses transitions on the data
terminal (SDA) while the clock is at logic high to indicate start and stop conditions. A high-to-low transition on
SDA indicates a start and a low-to-high transition indicates a stop. Normal data-bit transitions bust occur within
the low time of the clock period. Figure 32 shows a typical sequence. The master generates the 7-bit slave
address and the read/write (R/W) bit to open communication with another device and then waits for an
acknowledge condition. The TPA6140A2 holds SDA low during the acknowledge clock period to indicate
acknowledgment. When this occurs, the master transmits the next byte of the sequence. Each device is
addressed by a unique 7-bit slave address plus R/W bit (1 byte). All compatible devices share the same signals
via a bidirectional bus using a wired-AND connection.
The TPA6140A2 operates as an I2C slave. The I2C voltage can not exceed the TPA6140A2 supply voltage,
AVDD.
An external pull-up resistor must be used for the SDA and SCL signals to set the logic high level for the bus.
When the bus level is 3.3 V, use pull-up resistors between 660
and 1.2 k.
Copyright 2009, Texas Instruments Incorporated
19
Product Folder Link(s): TPA6140A2
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TPA6140A2YFFT | 制造商:Texas Instruments 功能描述:Audio Power Amplifier IC |
| TPA6141A2 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:CLASS-G DIRECTPATH? STEREO HEADPHONE AMPLIFIER |
| TPA6141A2YFFEVM | 功能描述:音頻 IC 開發(fā)工具 TPA6141A2YFF Eval Mod RoHS:否 制造商:Texas Instruments 產品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| TPA6141A2YFFR | 功能描述:音頻放大器 25mW Class-G Direct Path St Headph Amp RoHS:否 制造商:STMicroelectronics 產品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| TPA6141A2YFFT | 功能描述:音頻放大器 25mW Class-G Direct Path St Headph Amp RoHS:否 制造商:STMicroelectronics 產品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
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