- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385009 > TP3420A (National Semiconductor Corporation) ISDN S/T Interface Device PDF資料下載
參數(shù)資料
| 型號(hào)： | TP3420A |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | ISDN S/T Interface Device |
| 中文描述： | 綜合業(yè)務(wù)數(shù)字網(wǎng)的S / T接口設(shè)備 |
| 文件頁數(shù)： | 5/32頁 |
| 文件大?。?/td> | 524K |
| 代理商： | TP3420A |
第1頁第2頁第3頁第4頁當(dāng)前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
Functional Description
(Continued)
boundary, by using a 0
+
bit followed by a 0
balance bit to in-
dicate the start of a frame, and forcing the first binary zero
following the balance bit to be of the same polarity as the bal-
ance bit.
In the Network Termination (NT) to the Terminal Equipment
(TE) transmission direction the frame contains an echo
channel, the E bit, which is used to retransmit the D bits that
are received from the TE. The last bit of this frame is used as
a
frame
balancing
bit.
In
d.c.-balancing is carried out for each channel, as illustrated
in Figure 2
the TE
to
NT direction,
LINE TRANSMIT SECTION
The differential line-driver outputs, L
+ and L
, are de-
signed to drive a transformer with an external termination re-
sistor. A suitable 2:1 transformer, terminated in 50
, results
in a signal amplitude of nominally 750 mV pk on the line
which fully complies with the I.430 pulse mask specifica-
tions. When driving a binary 1 symbol the output presents a
high impedance in accordance with I.430. When driving a 0+
or 0 symbol a voltage-limited current source is turned on.
Short-circuit protection is included in the output stage;
over-voltage protection is required externally, see the Appli-
cations section.
LINE RECEIVE SECTION
The receive input signal should be derived via a 1:1 trans-
former, or a 1:2 transformer of the same type used for the
transmit direction. At the front-end of the receive section is a
continuous filter which limits the noise bandwidth. To correct
pulse attenuation and distortion caused by the transmission
line in point-to-point and extended passive bus applications,
an adaptive equalizer enhances the received pulse shape,
thereby restoring a “flat” channel response with maximum
eye opening over a wide spread of cable attenuation charac-
teristics. This equalizer is always enabled when either TE
mode or NT Mode Adaptive Sampling is selected, but is dis-
abled for short passive bus applications when NT Mode
Fixed Sampling is selected. An adaptive threshold circuit
maximizes the Signal-to-Noise ratio in the eye at the detec-
tor for all loop conditions.
In NTF mode the receive baud sampling point is fixed rela-
tive to the transmit baud clock. This ensures accurate sam-
pling of received pulses with differential delays on a passive
bus, thus extending the short passive bus range to over
250m of low capacitive cable.
In NTA and TE modes, the receive baud sampling is adap-
tive. In these modes, a DPLL (Digital Phase-Locked Loop)
recovers a low-jitter clock for optimum sampling of the re-
ceived symbols. The MCLK input provides the reference
clock for the DPLL at 15.36 MHz. Clocks for the digital inter-
face timing may either be derived from this recovered clock,
as in TE mode Digital System Interface Master, or may be
slaved to an external source, as in the T-interface side of an
NT-2 (TES mode). In TES and NT modes, re-timing circuitry
on the TP3420A allows the MCLK frequency to be plesio-
chronous (i.e., free-running) with respect to the network
clock, i.e. the 8 kHz FS
a
input. With a tolerance on the MCLK
oscillator of 15.36 MHz
±
100 ppm, the lock-in range of the
DPLL allows the network clock frequency to deviate up to
±
50 ppm from nominal.
When the device is powered-down (either on initial
powering-on of the device or after using a PDN command), a
Line-Signal Detect circuit is enabled to detect the presence
of incoming data if the far-end starts to activate the loop. The
LSD circuit is disabled by a Power-Up (PUP) command.
DS009143-4
FIGURE 1. Inverted AMI Line-Coding Rule
www.national.com
5
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TP3420AN | ISDN S/T Interface Device |
| TP3420AV | ISDN S/T Interface Device |
| TP3464 | MICROWIRE⑩ Interface Device (MID) |
| TP3464N | MICROWIRE⑩ Interface Device (MID) |
| TP3465N | MICROWIRE⑩ Interface Device (MID) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TP3420AJ | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:ISDN S/T Interface Device |
| TP3420AN | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:ISDN S/T Interface Device |
| TP3420AN308 | 功能描述:IC INTERFACE DEVICE ISDN 20-DIP RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:* 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| TP3420AV | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:ISDN S/T Interface Device |
| TP3420AV308 | 功能描述:射頻收發(fā)器 RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。