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參數(shù)資料
| 型號： | TP3404 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Quad Digital Adapter for Subscriber Loops (QDASL) |
| 中文描述： | 四適配器數(shù)字用戶環(huán)路（QDASL） |
| 文件頁數(shù)： | 2/14頁 |
| 文件大小： | 212K |
| 代理商： | TP3404 |
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
V
DDA
/V
DDD
to GNDA/GNDD
Voltage at Any Li, Lo Pin
7V
V
CC
a
1V to GND
b
1V
Current at Any Lo
g
100 mA
Voltage at Any Digital Input
V
CC
a
1V to GND
b
1V
Current at Any Digital Output
g
50 mA
Storage Temperature Range
b
65
§
C to
a
150
§
C
Lead Temperature (Soldering, 10 sec.)
300
§
C
Electrical Characteristics
Unless otherwise specified, limits printed in
BOLD
characters are guaranteed for
V
CCA
e
V
CCD
e
5V
g
5%, T
A
e
0
§
C to
a
70
§
C. Typical characteristics are specified at V
DDA
e
V
DDD
e
5.0V, T
A
e
25
§
C. All
signals are referenced to GND, which is the common of GNDA and GNDD
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DIGITAL INTERFACES
V
IH
Input High Voltage
All Digital Inputs (DC)
2
V
V
IL
Input Low Voltage
All Digital Inputs (DC)
0.8
V
V
OH
Output High Voltage
I
L
e a
1 mA
2.4
V
V
OL
Output Low Voltage
I
L
e b
1 mA
0.4
V
I
IL
Input Low Current
All Digital Input, GND
k
V
IN
k
V
IL
b
10
10
m
A
I
IH
Input High Current
All Digital Input, V
IH
k
V
IN
k
V
CC
b
10
10
m
A
I
OZ
Output Current in High Impedance
(TRl-STATE
é
)
BO, CO, and DO
b
10
10
m
A
LINE INTERFACES
R
Li
Input Resistance
0V
k
V
Li
k
V
CC
20
k
X
C
LLo
Load Capacitance
From Lo to GND
200
pF
ROLS
Output Resistance
Load
e
60
X
in Series with 2
m
F to GND
3
X
V
DC
Mean DC Voltage at Lo
Voltage at LS
a
, LS
b
Load
e
200
X
in Series with 2
m
F to GND
1.75
2.25
V
POWER DISSIPATION
I
CC
0
Power Down Current
BCLK
e
0 Hz; MCLK
e
0 Hz, CCLK
e
0 Hz
10
mA
I
CC
1
Power Up Current
All 4 Channels Activated
75
mA
TRANSMISSION PERFORMANCE
Transmit Pulse Amplitude at Lo
R
L
e
200
X
in Series with 2
m
F to GND
1.1
1.3
1.5
Vpk
Input Pulse Amplitude at Li
g
60
mVpk
TIMING SPECIFICATIONS
Symbol
Parameter
Conditions
Min
Typ
Max
Units
MASTER CLOCK INPUT SPECIFICATIONS
f
MCLK
Frequency of MCLK
4.096
MHz
Master Clock Tolerance
Relative 2X MCLK in Slave
b
100
a
100
ppm
t
WMH
Period of MCLK High
Measured from V
IH
to V
IH
70
ns
t
WML
Period of MCLK Low
Measured from V
IL
to V
IL
70
ns
t
RM
Rise Time of MCLK
Measured from V
IL
to V
IH
15
ns
t
FM
Fall Time of MCLK
Measured from V
IH
to V
IL
15
ns
2
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