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參數(shù)資料
| 型號(hào)： | TP3155N |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | TP3155 Time Slot Assignment Circuit |
| 中文描述： | DATACOM, TIME SLOT ASSIGNER, PDIP20 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-20 |
| 文件頁(yè)數(shù)： | 4/10頁(yè) |
| 文件大?。?/td> | 208K |
| 代理商： | TP3155N |
Connection Diagrams
Plastic Chip Carrier (PCC) Package
TL/H/5118–5
Order Number TP3155V
See NS Package Number V20A
Dual-In-Line Package
TL/H/5118–6
Top View
Order Number TP3155N
See NS Package Number N20A
Pin Descriptions
Symbol
Description
FS
X
1
A conventional CMOS frame sync output
which is normally low, and goes active-high
for 8 cycles of BCLK when a valid transmit
time slot assignment is made.
FS
R
1
A conventional CMOS frame sync output
which is normally low, and goes active-high
for 8 cycles of BCLK when a valid receive
time slot assignment is made.
FS
X
0
FS
R
0
TS
X
A transmit frame sync output similar to pin 1.
A receive frame sync output similar to pin 2.
An open-drain N-channel output which is nor-
mally high impedance but pulls low during any
active transmit time slot.
D
C
The input for an 8-bit serial control word. X is
the first bit clocked in.
CLK
C
CS
The clock input for the control interface.
The active-low chip select for the control in-
terface.
MODE
The mode select input. When left open-circuit
or connected to V
CC
, mode 1 is selected, and
when connected to GND, mode 2 is selected.
GND
The 0V ground connection to the device.
Symbol
Description
BCLK
The bit clock input, which should run at the
same rate as that for the COMBO CODEC/
Filter COMBO.
XSYNC
The transmit TS0 sync pulse input. Must be
synchronous with BCLK.
RSYNC/CH2 The function of this input is determined by the
MODE input (pin 9). In mode 1 this is the re-
ceive TS0 sync pulse, RSYNC, which must be
synchronous with BCLK. In mode 2 this is the
CH2 input for the MSB of the channel select
word.
CH1
The input for the next significant bit of the
channel select word.
CH0
The input for the LSB of the channel select
word, which defines the frame sync output af-
fected by the following control word.
FS
X
3
FS
R
3
FS
X
2
FS
R
2
V
CC
A transmit frame sync output similar to pin 1.
A receive frame sync output similar to pin 2.
A transmit frame sync output similar to pin 1.
A receive frame sync output similar to pin 2.
The positive supply to the device. 5V
g
5%.
4
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PDF描述 |
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| TP3155 | TP3155 Time Slot Assignment Circuit |
| TP3210 | SUBSCRIBER LINE INTERFACE MODULE |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TP3155N/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Time-Slot Assigner |
| TP3155N/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Time-Slot Assigner |
| TP3155V | 功能描述:IC CIRCUIT TIME SLOT 20-PLCC RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:* |
| TP3155V/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Time-Slot Assigner |
| TP3155V/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Time-Slot Assigner |
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