參數(shù)資料
型號(hào): TNT4882-BQ
英文描述: Peripheral Miscellaneous
中文描述: 周邊雜項(xiàng)
文件頁數(shù): 13/16頁
文件大?。?/td> 165K
代理商: TNT4882-BQ
TNT4882
Single-Chip IEEE 488.2 Talker/Listener ASIC
National Instruments
Phone: (512) 794-0100 Fax: (512) 683-9300 info@natinst.com www.natinst.com
13
Figure 11. I/O Read Access
Waveforms continued on page 14
ISA Mode Capacitance
Parameter
Pin capacitance
DATA15-0, DRQ, INTR, IOCS16N,
IOCHRDY, ADDR6
Pin capacitance
D7_0_OEN, D15_8_OEN, TP_INTWTN,
KEYDQ, KEYRSTN, KEYCLKN, ADDR4,
ADDR8, ADDR9
Pin capacitance
BHEN_N, ADDR3-0, ADDR5, ADDR7,
DACKN, AEN_N, MODE, TESTMODE,
PWBSEL2-0, SW9, SENSE_8_16N,
IORN, IOWN, RESET
Pin capacitance
DIO8-1N, RENN, ATNN, IFCN, SRQN,
DAVN, EOIN, NDACN, NRFDN
Symbol
C
Min
Typ
3.6
Max
Unit
pF
Notes
C
3.0
pF
C
3.5
pF
C
50
pF
Parameter
ADDR9-0 setup to IORN, IOWN
ADDR9-0 hold from IORN, IOWN
DACKN setup to IORN, IOWN
DACKN hold from IORN, IOWN
Data setup time to IOWN rising
Data hold time from IOWN rising
IORN low pulse width
IORN high pulse width
IOWN low pulse width
IOWN high pulse width
IORN or IOWN held from IOCHRDY
DRQ unassertion time
DRQ unassertion time
Data access time from IORN falling, DMA
Data access time from IORN falling, I/O
Data hold time from IORN rising
Data float time from IORN rising
IOCS16N assertion after valid address
IOCS16N negation after invalid address
IOCHRDY negation from IORN or IOWN
IOCHRDY release after IORN or IOWN
Symbol
t
AS
t
AH
t
DS
t
DH
t
SU
t
WH
t
RPWL
t
RPWH
t
WPWL
t
WPWH
t
TD
t
DU
t
DU
t
DACC
t
ACC
t
RH
t
DF
t
DEC
t
DECN
t
RDYN
t
RDY
Min
30
0
0
20
22
0
100
42
100
100
20
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
73
48
80
80
Due to FIFO full/empty
Due to byte count reached
0
30
30
20
40
350
ISA Mode AC Characteristics
ADDR9-0, AEN_N
IORN
DATA15-0
IOCS16N
IOCHRDY
t
AH
t
RH
t
DF
t
DECN
t
TD
t
RDY
t
RDYN
t
ACC
t
DEC
t
AS
t
RPWL
t
RPWH
ISA Mode AC Characteristics Waveforms
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