參數(shù)資料
型號: TMX320C6413ZTSA400
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: Fixed-Point Digital Signal Processors
中文描述: 定點(diǎn)數(shù)字信號處理器
文件頁數(shù): 86/140頁
文件大小: 1958K
代理商: TMX320C6413ZTSA400
Peripheral Power-Down Operation
86
April 2004
Revised May 2005
SPRS247E
4.9
Peripheral Power-Down Operation
The C6413/C6410 device can be powered down in two ways:
Power-down due to software configuration
relates to the default state of the peripheral configuration bits
in the PERCFG register.
Power-down during run-time via software configuration
On the C6413/C6410 device, the HPI, McASP1, and GP0 peripherals pin muxing is controlled (selected) at
the pin level during chip reset (e.g., HPI_EN and HD5 pins). If McASP1 pin muxing is selected, then the
MCASP1EN bit in the peripheral configuration register (PERCFG.8) must be configured properly to enable
the McASP1 peripheral.
The McASP1, McASP0, I2C1, and I2C0 peripheral functions are selected via the peripheral configuration
(PERCFG) register bits.
For more detailed information on the peripheral configuration pins and the PERCFG register bits, see the
Device Configurations
section of this document.
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