- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382643 > TMS416169P-80 (Texas Instruments, Inc.) 1048576-WORD BY 16-BIT EXTENDED DATA OUT HIGH-SPEED DRAMS PDF資料下載
參數(shù)資料
| 型號： | TMS416169P-80 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 1048576-WORD BY 16-BIT EXTENDED DATA OUT HIGH-SPEED DRAMS |
| 中文描述： | 1048576字由16位擴充數(shù)據(jù)輸出高速DRAM等 |
| 文件頁數(shù)： | 26/67頁 |
| 文件大?。?/td> | 1464K |
| 代理商： | TMS416169P-80 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當(dāng)前第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁
TMS55160, TMS55161, TMS55170, TMS55171
262144 BY 16-BIT MULTIPORT VIDEO RAMS
SMVS464
–
MARCH1996
26
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
load color register
The load-color-register cycle is performed using normal DRAM write-cycle timing except that DSF is held high
on the falling edges of RAS and on the first falling edge of CASx. The color register is loaded from pins
DQ0
–
DQ15, which are latched on either the falling edge of WE or the first falling edge of CASx, whichever
occurs later. If only one CASx is low, only the corresponding byte of the color register is loaded. When the color
register is loaded, it retains data until power is lost or until another load-color-register cycle is performed (see
Figure 17 and Figure 18).
RAS
CASx
A0
–
A8
WE
TRG
DSF
DQ0
–
DQ15
1
2
3
2
3
4
6
5
6
Load-Color-Register Cycle
Block-Write Cycle
(no write mask)
Block-Write Cycle
(nonpersistent write-per-bit)
Legend:
1. Refresh address: A0
–
A8 are latched on the falling edge of RAS.
2. Row address: A0
–
A8 are latched on the falling edge of RAS.
3. Block address A2
–
A8 (TMS5516x) or A3
–
A8 (TMS5517x) are latched on the first falling edge of CASx.
4. Color data: DQ0
–
DQ15 are latched on the falling edge WE or on the first falling edge of CASx, whichever occurs first.
5. Write-mask data: DQ0
–
DQ15 are latched on the falling edge RAS.
6. Column-mask data: DQ0
–
DQ15 are latched on the falling edge WE or on the first falling edge of CASx, whichever occurs first.
= don
’
t care
Figure 17. Example of Block Writes
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMS418169P-60 | 1048576-WORD BY 16-BIT EXTENDED DATA OUT HIGH-SPEED DRAMS |
| TMS418169P-70 | 1048576-WORD BY 16-BIT EXTENDED DATA OUT HIGH-SPEED DRAMS |
| TMS418169P-80 | 1048576-WORD BY 16-BIT EXTENDED DATA OUT HIGH-SPEED DRAMS |
| TMS4500A-15NL | DRAM Controller |
| TMS4500A-20FN | DRAM Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS4161FML-15 | 制造商:Texas Instruments 功能描述: |
| TMS4164 DIE | 制造商:Texas Instruments 功能描述: |
| TMS416400 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:4194304-WORD BY 4-BIT HIGH-SPEED DRAMS |
| TMS416400-60DZ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 Fast Page Mode DRAM |
| TMS416400-70DZ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 Fast Page Mode DRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。