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參數(shù)資料
| 型號： | TMS3473 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | PARALLEL DRIVER |
| 中文描述： | 并行驅(qū)動 |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 107K |
| 代理商： | TMS3473 |
TMS3473B
PARALLEL DRIVER
SOCS022B – NOVEMBER 1990
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Note 2)
MIN
NOM
MAX
UNIT
Positive supply voltage, VCC
Negative supply voltage, VSS
Positive ABG supply voltage, VABG+
Negative ABG supply voltage, VABG–
Power supply voltage differential (VCC – VSS)
DC parallel image area midlevel voltage, IALVL
0
1
4.4
V
–11.1
–10
–9.7
V
1
3.5
4.4
V
–11.1
–7
–6.2
V
15.5
V
Z < 5 k
Z < 2.5 k
ABIN, MIDSEL, PD, IAIN, or SAIN
–6
–5
–2
V
DC antiblooming midlevel voltage, ABLVL
–3.5
–2.5
1
V
High level input voltage VIH
High-level input voltage, VIH
2.5
5
V
I/N
VCC – 0.4
Low level input voltage VIL
Low-level input voltage, VIL
ABIN, MIDSEL, PD, IAIN, or SAIN
0
0.9
V
I/N
VSS + 0.4
Input voltage VI
Input voltage, VI
ABLVL
–3.5
1
V
IALVL
IAIN, SAIN§
ABIN§
–6
–2
Frequency fl
Frequency, fclock
3.58
MHz
2
Input resistance, Ri
Slope-resistance bias
IALVL, ABLVL
2.5
k
k
μ
F
°
C
10
50
Input capacitance, Ci
Operating free-air temperature, TA
VCC, VSS, VABG+, and VABG– have 100-mA current limits. Adequate decoupling capacitors are required from these terminals to ground.
Proper adjustment is required for interlace-mode operation.
§Different CCD image sensors have different maximum clock rates. See the individual CCD image sensor data sheets for these rates.
ABLVL
1
–20
45
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