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參數(shù)資料
| 型號： | TMS3471 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 2/3-INCH NTSC TIMER |
| 中文描述： | 3英寸NTSC制式定時器 |
| 文件頁數(shù)： | 4/18頁 |
| 文件大?。?/td> | 282K |
| 代理商： | TMS3471 |
TC241
780-
×
488-PIXEL CCD IMAGE SENSOR
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description
The TC241 consists of four basic functional blocks: (1) the image-sensing area, (2) the image-storage area,
(3) the multiplexer with serial registers and transfer gates, and (4) the buffer amplifier with charge-detection
nodes. The location of each of these blocks is shown in the functional block diagram.
image-sensing storage areas
Cross sections with potential-well diagrams and top views of image-sensing and storage-area elements are
shown in Figure 1 and Figure 2. As light enters the silicon in the image-sensing area, free electrons are
generated and collected in the potential wells of the sensing elements. During this time, the antiblooming gate
is activated by the application of a burst of pulses every horizontal-blanking interval. This prevents blooming
caused by the spilling of charge from overexposed elements into neighboring elements. After the completion
of integration, the signal charge is transferred into the storage area. To generate the dark reference necessary
in subsequent video-processing circuits for restoration of the video-black level, 23 full columns and one
half-column of elements at the left edge of the image-sensing area are shielded from incident light. Two full
columns and one half-column of elements at the right of the image-sensing area are also shielded from incident
light. The total number of elements per row is 780 (753 active elements plus 25 shielded elements and 2
transitional elements).
multiplexer with transfer gates and serial registers
The multiplexer and transfer-gates transfer charge line by line from the image-element columns into the
corresponding serial register and prepare it for readout. Multiplexing is activated during the horizontal-blanking
interval by applying appropriate pulses to the transfer gates and serial registers. The required pulse timing is
shown in Figure 3. A drain is included in this area to provide the capability to quickly clear the image-sensing
and storage areas of unwanted charge. Such charge can accumulate in the imager during the start-up of
operation or under special circumstances when nonstandard TV operation is desired.
buffer amplifier with charge-detection nodes
The buffer amplifier converts charge into a video signal. Figure 4 shows the circuit diagram of a charge-detection
node and one of the three amplifiers. As charge is transferred into the detection node, the potential of this node
changes in proportion to the amount of signal received. This change is sensed by an MOS transistor and, after
proper buffering, the signal is supplied to the output terminal of the image sensor. After the potential change has
been sensed, the node is reset to a reference voltage supplied by an on-chip reference generator. The reset
is accomplished by a reset gate that is connected internally to the serial register. The detection nodes and
corresponding amplifiers are located some distance from the edge of the storage area; six dummy elements
are used to span this distance. The location of the dummy elements is shown in the functional block diagram.
ABG
IAG
11.5
μ
m
Clocked Barrier
Virtual Barrier
Antiblooming Gate
Virtual Well
Clocked Well
Light
Antiblooming
Clocking Levels
Accumulated Charge
27
μ
m
Figure 1. Charge-Accumulation Process
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