參數(shù)資料
型號: TMS32C6414EGLSA6E3
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: FIXED-POINT DIGITAL SIGNAL PROCESSORS
中文描述: 定點數(shù)字信號處理器
文件頁數(shù): 95/141頁
文件大小: 2234K
代理商: TMS32C6414EGLSA6E3
TMS320C6414, TMS320C6415, TMS320C6416
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS146N
FEBRUARY 2001
REVISED MAY 2005
95
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
SYNCHRONOUS DRAM TIMING (CONTINUED)
ECLKOUTx
CEx
ABE[7:0] or BBE[1:0]
AEA[12:3] or BEA[10:1]
AED[63:0] or BED[15:0]
AEA13 or BEA11
AOE/SDRAS/SOE
ARE/SDCAS/SADS/SRE
AWE/SDWE/SWE
AEA[22:14] or BEA[20:12]
BE1
BE2
BE3
BE4
Bank
Column
D1
D2
D3
D4
8
7
6
5
5
5
1
3
2
8
4
4
4
1
READ
PDT
§
14
14
These C64x
devices have two EMIFs (EMIFA and EMIFB). All EMIFA signals are prefixed by an “A” and all EMIFB signals are prefixed by a
“B”. Throughout the rest of this document, in generic EMIF areas of discussion, the prefix “A” or “B” may be omitted [e.g., the synchronous DRAM
memory access signals are shown as generic ( SDCAS, SDWE, and SDRAS ) instead of ASDCAS, ASDWE, and ASDRAS (for EMIFA) and
BSDCAS, BSDWE, and BSDRAS (for EMIFB)].
ARE/SDCAS/SADS/SRE, AWE/SDWE/SWE, and AOE/SDRAS/SOE operate as SDCAS, SDWE, and SDRAS, respectively, during SDRAM
accesses.
§
PDT signal is only asserted when the EDMA is in PDT mode (set the PDTS bit to 1 in the EDMA options parameter RAM). For PDT read, data
is not latched into EMIF. The PDTRL field in the PDT control register (PDTCTL) configures the latency of the PDT signal with respect to the data
phase of a read transaction. The latency of the PDT signal for a read can be programmed to 0, 1, 2, or 3 by setting PDTRL to 00, 01, 10, or 11,
respectively. PDTRL equals 00 (zero latency) in Figure 27.
Figure 27. SDRAM Read Command (CAS Latency 3) for EMIFA and EMIFB
相關PDF資料
PDF描述
TMS32C6415CZLZA6E3 FIXED-POINT DIGITAL SIGNAL PROCESSORS
TMS32C6415DZLZA6E3 FIXED-POINT DIGITAL SIGNAL PROCESSORS
TMS32C6415EZLZA6E3 FIXED-POINT DIGITAL SIGNAL PROCESSORS
TMS32C6416CGLSA6E3 FIXED-POINT DIGITAL SIGNAL PROCESSORS
TMS32C6416CZLZA6E3 FIXED-POINT DIGITAL SIGNAL PROCESSORS
相關代理商/技術參數(shù)
參數(shù)描述
TMS32C6414EGLZ5E0 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Fixed-Pt Dig Signal Processor RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
TMS32C6414EGLZ6E3 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Fixed-Pt Dig Signal Processor RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
TMS32C6414EGLZ7E3 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Fixed-Pt Dig Sig Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
TMS32C6414EGLZA5E0 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Fixed-Pt Dig Signal Processor RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
TMS32C6414EGLZA5W0 制造商:Texas Instruments 功能描述: