參數(shù)資料
型號: TMS32C6411GLZ
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: FIXED POINT DIGITAL SIGNAL PROCESSOR
中文描述: 定點數(shù)字信號處理器
文件頁數(shù): 28/119頁
文件大?。?/td> 1742K
代理商: TMS32C6411GLZ
SPRS196H MARCH 2002 REVISED JULY 2004
28
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
signal groups description
TRST
EMU0
EMU1
EMU2
EMU3
EMU4
EMU5
EMU6
EMU7
EMU8
EMU9
EMU10
EMU11
GP7/EXT_INT7
GP6/EXT_INT6
GP5/EXT_INT5
GP4/EXT_INT4
IEEE Standard
1149.1
(JTAG)
Emulation
Reserved
Reset and
Interrupts
Control/Status
TDI
TCK
TDO
TMS
NMI
RESET
RSV
RSV
RSV
RSV
RSV
Clock/PLL
CLKIN
CLKMODE0
PLLV
RSV
GPIO
General-Purpose Input/Output (GPIO) Port
GP7/EXT_INT7
GP6/EXT_INT6
GP5/EXT_INT5
GP4/EXT_INT4
GP3
CLKOUT6/GP2
CLKOUT4/GP1
GP0
CLKOUT6/GP2
CLKOUT4/GP1
GP15/PRST§
GP14/PCLK§
GP13/PINTA§
GP12/PGNT§
GP11/PREQ§
GP10/PCBE3§
GP9/PIDSEL§
GP8
These pins are muxed with the GPIO port pins and by default these signals function as clocks (CLKOUT4 or CLKOUT6). To use
these muxed pins as GPIO signals, the appropriate GPIO register bits (GPxEN and GPxDIR) must be properly enabled and
configured. For more details, see the Device Configurations section of this data sheet.
These pins are GPIO pins that can also function as external interrupt sources (EXT_INT[7:4]). Default after reset is EXT_INTx or
GPIO as input-only.
These GPIO pins are muxed with the PCI peripheral pins and by default these signals are set up to no function with both the GPIO
and PCI pin functions
disabled
. For more details on these muxed pins, see the Device Configurations section of this data sheet.
RSV
RSV
RSV
Peripheral
Control and
Configuration
PCI_EN
LEND
BOOTMODE [1:0]
ECLKIN_SEL[1:0]
EEAI
HD5/AD5
§
Figure 3. CPU and Peripheral Signals
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