參數資料
型號: TMS320LFC2407A
廠商: Texas Instruments, Inc.
元件分類: 數字信號處理
英文描述: DSP CONTROLLERS
中文描述: DSP控制器
文件頁數: 89/133頁
文件大小: 1672K
代理商: TMS320LFC2407A
SPRS145J JULY 2000 REVISED NOVEMER 2004
89
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
interrupt timing
INT refers to XINT1 and XINT2. PDP refers to PDPINTx.
switching characteristics over recommended operating conditions (see Figure 38)
PARAMETER
MIN
MAX
UNIT
ns
td(PDP-PWM)HZ
Delay time, PDPINTA low to PWM
high-impedance state
if bit 6 of SCSR2 = 0
(6 + 1)tc(CO) + 12
(12+ 1)tc(CO) + 12
if bit 6 of SCSR2 = 1
ns
td(INT)
Delay time, INT low/high to interrupt-vector
fetch
10tc(CO) + tW (INT)
ns
Includes i/p qualifier cycles plus synchronization plus propagation delay
timing requirements (see Figure 38)
MIN
MAX
UNIT
Pulse duration, INT input low/high
if bit 6 of SCSR2 = 0
6tc(CO)
12tc(CO)
6tc(CO)
12tc(CO)
ns
tw(INT)
if bit 6 of SCSR2 = 1
Pulse duration, PDPINTx input low
if bit 6 of SCSR2 = 0
ns
tw(PDP)
if bit 6 of SCSR2 = 1
This is different from 240x devices.
PWM
PDPINTx
CLKOUT
tw(PDP)
td(PDP-PWM)HZ
XINT1, XINT2
tw(INT)
Interrupt Vector
td(INT)
PWM refers to
all
the PWM pins in the device (i.e., PWMn and TnPWM pins). The state of the PWM pins after PDPINTx is taken
high depends on the state of the FCOMPOE bit.
A0A15
Figure 38. External Interrupts Timing
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