參數(shù)資料
型號: TMS320DM647_08
廠商: Texas Instruments, Inc.
英文描述: Digital Media Processor
中文描述: 數(shù)字媒體處理器
文件頁數(shù): 143/167頁
文件大?。?/td> 1438K
代理商: TMS320DM647_08
www.ti.com
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6.18.1 Ethernet Subsystem Functions
SGMII 0
GMII port 0
Gigabit
MAC 0
SGMII 1
(A)
GMII port 1
2
2
2
Addr Lookup
Engine
SGMII
Port 0
Host DMA
Controller
3-port
Gigabit
Switch
Gigabit
MAC 1
Buffer
Descriptor
Memory
Configuration
Registers
REFCLK
2
2
SGMII
Port 1
MII
Serial
Mgmt
Peripheral
Bus
MDIO
Configuration
Bus
Configuration
Bus
DSP
Interrupt
Controller
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372A–MAY 2007–REVISED JUNE 2007
MDIO module for PHY management
SGMII gigabit current mode logic (CML) differential SERializer/DESerializer (SerDes) I/O
receiver/transmitters
Adaptive active equalization for superior data dependent jitter tolerance in the presence of a
lossy channel
Loss of signal detector with programmable threshold levels in receive channels
Integrated receiver and transmitter termination
IEEE 802.3 gigabit Ethernet conformant
Programmable statistics interrupt mask when a statistic is above one half its 32-bit value
A.
SGMII port 1 is not available on DM647.
Figure 6-42. Ethernet Subsystem Block Diagram
The Ethernet Subsystem conforms to the IEEE 802.3-2002 standard. Deviating from this standard, the
GMAC module does not use the transmit coding error signal MTXER. Instead of driving the error pin when
an underflow condition occurs on a transmitted frame, the GMAC generates an incorrect checksum by
inverting the frame CRC, so that the transmitted frame will be detected as an error by the network.
In networking systems, packet transmission and reception are critical tasks. The communications port
programming interface (CPPI) protocol maximizes the efficiency of interaction between the host software
and communications modules. The CPPI block in the DM648/DM647 contains 2048 words of 32-bit buffer
descriptor memory that holds up to 512 buffer descriptors.
After reset, initialization, configuration, and auto-negotiation, the host C64x+ DSP may initiate Ethernet
transmit and receive operations.
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