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6.20.2
GPIO Peripheral Input/Output Electrical Data/Timing
GP[x]
Input
GP[x]
Output
4
3
2
1
TMS320C6421
Fixed-Point Digital Signal Processor
SPRS346C–JANUARY 2007–REVISED NOVEMBER 2007
Table 6-83. Timing Requirements for GPIO Inputs
(1)
(see
Figure 6-47
)
-4/-4Q/-4S
-5/-5Q/-5S
-6
MIN
2C
(2)
2C
(2)
NO.
UNIT
MAX
1
2
t
w(GPIH)
t
w(GPIL)
Pulse duration, GP[x] input high
Pulse duration, GP[x] input low
ns
ns
(1)
The pulse width given is sufficient to generate a CPU interrupt or an EDMA event. However, if a user wants to have C6421 recognize
the GP[x] input changes through software polling of the GPIO register, the GP[x] input duration must be extended to allow C6421
enough time to access the GPIO register through the internal bus.
C = SYSCLK3 period in ns. For example, when running parts at 600 MHz, use C = 10ns.
(2)
Table 6-84. Switching Characteristics Over Recommended Operating Conditions for GPIO Outputs
(see
Figure 6-47
)
-4/-4Q/-4S
-5/-5Q/-5S
-6
MIN
2C
(1)(2)
2C
(1)(2)
NO.
PARAMETER
UNIT
MAX
3
4
t
w(GPOH)
t
w(GPOL)
Pulse duration, GP[x] output high
Pulse duration, GP[x] output low
ns
ns
(1)
This parameter value should not be used as a maximum performance specification. Actual performance of back-to-back accesses of the
GPIO is dependent upon internal bus activity.
C = SYSCLK3 period in ns. For example, when running parts at 600 MHz, use C = 10ns.
(2)
Figure 6-47. GPIO Port Timing
216
Peripheral Information and Electrical Specifications
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