參數(shù)資料
型號(hào): TMS320AV220
廠商: Texas Instruments, Inc.
英文描述: Video CD MPEG Decoder(視頻CD MPEG編碼器)
中文描述: 視頻CD MPEG解碼器(視頻光盤的MPEG編碼器)
文件頁數(shù): 3/31頁
文件大小: 612K
代理商: TMS320AV220
TMS320AV220
VIDEO CD MPEG DECODER
SCSS016A – JUNE 1994 – REVISED JANUARY 1996
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
NAME
I/O
DESCRIPTION
NO.
ADDR13
ADDR12
ADDR11
ADDR10
ADDR9
ADDR8
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
118
117
116
115
112
111
110
109
108
106
105
104
103
102
I
Host address bus. ADDR13–ADDR0 are used by the host to address the ’AV220 registers and
external DRAM.
ARESET
51
O
Audio reset, active low. ARESET can be tied directly to RESET of the TMS320AV120 audio
decoder.
ASOUT
56
O
Audio data serial output. MPEG audio frames are output at ASOUT. ASOUT can be tied directly to
the SIN input of the TMS320AV120.
CDATA7
CDATA6
CDATA5
CDATA4
CDATA3
CDATA2
CDATA1
CDATA0
67
66
65
64
62
61
60
59
I
Compressed-data bus. MPEG-1 system streams are input at this bus.
CDEN
70
I
Compressed-data enable, active low. When CDSEL is low, CDEN acts as the write strobe from the
CD controller. When CDSEL is high, CDEN acts as the transfer enable from the CD controller.
CDERROR
69
I
Compressed-data error. When CDERROR is high, the data on CDATA contains errors.
CDREAD
72
O
Compressed-data read strobe. When CDSEL is low, the rising edge of CDREAD is the read request
to the CD controller. When CDSEL is high, the falling edge of CDREAD is the read request and data
is latched on the rising edge of CDREAD.
CDSEL
73
I
Compressed-data interface select. CDSEL changes the operation of CDEN and CDREAD to select
between different CD controllers. CDSEL low selects the Sony interface and CDSEL high selects
the Sanyo interface.
CDWAIT
71
I
Compressed-data wait. CDWAIT is active low when CDSEL is high and should be tied high when
CDSEL is low.
CS
88
I
Chip select, active low. CS enables register or DRAM read/writes by the host processor.
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
92
93
94
95
97
98
99
100
I/O
Host data bus. DATA7–DATA0 is used by the host processor when accessing ’AV220 registers and
during direct memory DRAM accesses. MPEG data can not be input on DATA7–DATA0.
GND
2, 11 21,
32, 39, 45,
54, 63, 74,
79, 86, 87,
96, 107,
114, 119,
125, 135,
147, 157
Ground
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