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參數(shù)資料
| 型號： | TMS27C010A-15 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Programmable Read-Only Memory(128K×8結(jié)構(gòu),可擦可編程只讀存儲器) |
| 中文描述： | 可編程只讀存儲器（128K的× 8結(jié)構(gòu)，可擦可編程只讀存儲器） |
| 文件頁數(shù)： | 5/13頁 |
| 文件大?。?/td> | 269K |
| 代理商： | TMS27C010A-15 |
TMS27C010A 1048576-BIT UV ERASABLE PROGRAMMABLE
TMS27PC010A 1048576-BIT PROGRAMMABLE
READ-ONLY MEMORY
SMLS110B – NOVEMBER 1990 – REVISED JUNE 1995
5
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
SNAP! Pulse programming
The TMS27C010A and TMS27PC010A are programmed using the TI SNAP! Pulse programming algorithm
illustrated by the flowchart in Figure 1, which programs in a nominal time of thirteen seconds. Actual
programming time varies as a function of the programmer used.
The SNAP! Pulse programming algorithm uses an initial pulse of 100 microseconds (
μ
s) followed by a byte
verification to determine when the addressed byte has been successfully programmed. Up to 10 (ten) 100-
μ
s
pulses per byte are provided before a failure is recognized.
The programming mode is achieved when V
PP
= 13 V, V
CC
= 6.5 V, E = V
IL
, G = V
IH
. Data is presented in parallel
(eight bits) on pins DQ0 through DQ7. Once addresses and data are stable, PGM is pulsed low.
More than one device can be programmed when the devices are connected in parallel. Locations can be
programmed in any order. When the SNAP! Pulse programming routine is complete, all bits are verified with
V
CC
= V
PP
= 5 V
±
10%.
program inhibit
Programming can be inhibited by maintaining a high level input on the E or PGM pins.
program verify
Programmed bits can be verified with V
PP
= 13 V when G = V
IL
, E = V
IL
, and PGM = V
IH
.
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| TMS27C010A-15JE4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
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| TMS27C010A-20 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:8-BIT PROGRAMMABLE READ-ONLY MEMORIES |
| TMS27C010A-20JE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
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