參數(shù)資料
型號(hào)： TMP86FS49BUG
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP64
封裝： 10 X 10 MM, 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-64
文件頁(yè)數(shù)： 43/54頁(yè)
文件大?。?/td> 2519K
代理商： TMP86FS49BUG
Page 31
TMP86FS49BUG
2.3 Reset Circuit
The TMP86FS49BUG has four types of reset generation procedures: An external reset input, an address trap reset,
a watchdog timer reset and a system clock reset. Of these reset, the address trap reset, the watchdog timer and the
system clock reset are a malfunction reset. When the malfunction reset request is detected, reset occurs during the
maximum 24/fc[s].
The malfunction reset circuit such as watchdog timer reset, address trap reset and system clock reset is not initial-
ized when power is turned on. Therefore, reset may occur during maximum 24/fc[s] (1.5
s at 16.0 MHz) when
power is turned on.
Table 2-3 shows on-chip hardware initialization by reset action.
2.3.1 External Reset Input
The RESET pin contains a Schmitt trigger (Hysteresis) with an internal pull-up resistor.
When the RESET pin is held at “L” level for at least 3 machine cycles (12/fc [s]) with the power supply volt-
age within the operating voltage range and oscillation stable, a reset is applied and the internal state is initial-
ized.
When the RESET pin input goes high, the reset operation is released and the program execution starts at the
vector address stored at addresses FFFEH to FFFFH.
Figure 2-15 Reset Circuit
Table 2-3 Initializing Internal Status by Reset Action
On-chip Hardware
Initial Value
On-chip Hardware
Initial Value
Program counter
(PC)
(FFFEH)
Prescaler and divider of timing generator
0
Stack pointer
(SP)
Not initialized
General-purpose registers
(W, A, B, C, D, E, H, L, IX, IY)
Not initialized
Jump status flag
(JF)
Not initialized
Watchdog timer
Enable
Zero flag
(ZF)
Not initialized
Output latches of I/O ports
Refer to I/O port circuitry
Carry flag
(CF)
Not initialized
Half carry flag
(HF)
Not initialized
Sign flag
(SF)
Not initialized
Overflow flag
(VF)
Not initialized
Interrupt master enable flag
(IMF)
0
Interrupt individual enable flags
(EF)
0
Control registers
Refer to each of control
register
Interrupt latches
(IL)
0
RAM
Not initialized
Internal reset
RESET
VDD
Malfunction
reset output
circuit
Watchdog timer reset
Address trap reset
System clock reset
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMP86FS49BUG(C,JZ) 功能描述:8位微控制器 -MCU INTEGRATED CIRCUIT MICROCONTROLLER - TLCS870C FAMILY RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
TMP86FS49FG 功能描述:IC MCU FLASH 8BIT 60K 64QFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:TLCS-870/C 標(biāo)準(zhǔn)包裝:160 系列:HCS12 核心處理器:HCS12 芯體尺寸:16-位 速度:25MHz 連通性:CAN，EBI/EMI，SCI，SPI 外圍設(shè)備:POR，PWM，WDT 輸入/輸出數(shù):35 程序存儲(chǔ)器容量:128KB（128K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:4K x 8 電壓 - 電源 (Vcc/Vdd):2.35 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:52-LQFP 包裝:托盤
TMP86FS64FG 制造商:Toshiba America Electronic Components 功能描述:MCU 8BIT TLCS-870 CISC 60KB FLASH 5V 100PQFP - Bulk
TMP86FS64FG(TZ) 功能描述:8位微控制器 -MCU 60K Flash MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
TMP86P202MG 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:8 Bit Microcontroller
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