參數資料
型號: TMC2490AR2C
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 顏色信號轉換
英文描述: Multistandard Digital Video Encoder
中文描述: COLOR SIGNAL ENCODER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數: 24/36頁
文件大小: 510K
代理商: TMC2490AR2C
TMC2490A
PRODUCT SPECIFICATION
24
REV. 1.0.2 2/27/02
Table 15. Serial Port Addresses
Data Transfer via Serial Interface
For each byte of data read or written, the MSB is the first bit
of the sequence.
If the TMC2490A does not acknowledge the master device
during a write sequence, the SDA/R/W remains HIGH so the
master can generate a stop signal. If the master device does
not acknowledge the TMC2490A during a read sequence,
the TMC2490A interprets this as “end of data.” The SDA/R/
W remains HIGH so the master can generate a stop signal.
Writing data to specific control registers of the TMC2490A
requires that the 8-bit address of the control register of inter-
est be written after the slave address has been established.
This control register address is the base address for subse-
quent write operations. The base address auto-increments by
one for each byte of data written after the data byte intended
for the base address. If more bytes are transferred than there
A
6
0
0
0
0
A
5
0
0
0
0
A
4
0
0
0
0
A
3
1
1
1
1
A
2
1
1
1
1
A
1
(SA
1
)
0
0
1
1
A
0
(SA
0
)
0
1
0
1
are available addresses, the address will not increment and
will remain at its maximum value of 22h. Any base address
higher than 22h will not produce an ACKnowledge signal.
Data is read from the control registers of the TMC2490A in a
similar manner. Reading requires two data transfer opera-
tions:
The base address must be written with the R/W bit of the
slave address byte LOW to set up a sequential read
operation.
Reading (the R/W bit of the slave address byte HIGH)
begins at the previously established base address. The
address of the read register auto-increments after each
byte is transferred.
To terminate a read/write sequence to the TMC2490A, a stop
signal must be sent. A stop signal comprises of a LOW-to-
HIGH transition of SDA/R/W while SCL/CS is HIGH.
A repeated start signal occurs when the master device driv-
ing the serial interface generates a start signal without first
generating a stop signal to terminate the current communica-
tion. This is used to change the mode of communication
(read, write) between the slave and master without releasing
the serial interface lines.
Figure 15. Serial Port Read/Write Timing
t
BUFF
t
DAL
t
DAH
t
STAH
t
DHO
SDA / R/
W
SCL/
CS
t
DSU
24469A
t
STOSU
t
STASU
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