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參數(shù)資料
| 型號： | TMC2360KLC |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | COLOR SIGNAL ENCODER, PQFP80 |
| 封裝： | 2.70 MM HEIGHT, MQFP-80 |
| 文件頁數(shù)： | 19/24頁 |
| 文件大?。?/td> | 158K |
| 代理商： | TMC2360KLC |
TMC2360
PRODUCT SPECIFICATION
4
VGAVS
45
CMOSS
VGA Vertical Sync. Incoming VGA sync may be of either polarity
(active LOW or active HIGH). The VGAVS pin has a light pull-up and
a Schmitt trigger.
HSOUT
27
TTL
Buffered Horizontal Sync Output. Follows VGAHS.
VSOUT
26
TTL
Buffered Vertical Sync Output. Follows VGAVS.
Global Controls
TVSTD1-0
39, 40
CMOSP
Video Output Standard Select. Preprogrammed into the TMC2360
are timing, subcarrier frequency and phase parameters
corresponding to worldwide NTSC and PAL standards. TVSTD1-0
select one of four sets of parameters to set up the encoder. Frame
rate of the graphics source must be twice the frame rate of the
selected video standard.
PAL800
41
CMOSP
Resolution Select for PAL. Sets number of samples per VGA line.
DPMS
43
CMOSP
Display Power Management Signaling Enable. When HIGH, the
operational state of the TMC2360 is controlled by the pulse activity on
VGAHS and VGAVS. When LOW, the state of the TMC2360 is
controlled only by input pins.
FIL
42
CMOSS
Flicker Filter Mode Select. The adaptive flicker reduction filter may
be configured for HIGH filtering, MEDIUM filtering, or NO filtering by
pulsing this input HIGH. FIL defaults to HIGH-filter mode upon power-
up. If VSCOM is HIGH, the filter mode will be selected by the
pulsewidth of VGAVS, and FIL will be ignored. The FIL input is a
Schmitt trigger.
VSCOM
44
CMOSP
Vertical Sync Communications Enable. When HIGH, vertical sync
pulse width (VGAVS) will control the filter mode, and FIL will be
ignored.
PWRDN
72
CMOSP
Power-Down Control. When HIGH, the TMC2360 is fully operational
and enabled. When LOW, the TMC2360 is configured for minimum
power consumption. D/A converters and clocks are disabled.
Previously established set-up conditions are retained and remain in
effect when PWRDN goes HIGH.
RESET
71
CMOSP
Reset. Initializes internal registers.
PHASE
6
CMOSP
Sampling Phase Control. Shifts the A/D sampling phase by 180
°.
Set Phase = LOW.
Encoder Controls
CVIDEN
74
CMOSP
Composite Video D/A Power Enable. When HIGH, the
COMPOSITE D/A converter is enabled. When LOW it is disabled to
save power.
SVIDEN
73
CMOSP
S-Video D/A Power Enable. When HIGH, the CHROMA and LUMA
D/A converters are enabled. When LOW, they are disabled to save
power.
BLANK
38
CMOSP
Blank Screen Generator. When HIGH, the color selected by BLUE
is displayed on the screen. When LOW, incoming video from the
internal FIFO is encoded.
BLUE
37
CMOSP
Blank Screen Color Selector. When HIGH, the screen will be
blanked to blue when BLANK is HIGH. When LOW, the screen will be
blanked to black when BLANK is HIGH.
Pin Descriptions (continued)
Pin Name
Pin Number
Type/
Value
Pin Function Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMC2360KMC | COLOR SIGNAL CONVERTER, PQFP80 |
| TMC2360R0C | COLOR SIGNAL CONVERTER, PQCC84 |
| TMC2360KLC | COLOR SIGNAL ENCODER, PQFP80 |
| TMC2361KPC | COLOR SIGNAL ENCODER, PQFP64 |
| TMC2366KHC | COLOR SIGNAL ENCODER, PQFP100 |
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