參數(shù)資料
型號: TMC2302AKEC
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 數(shù)字信號處理外設(shè)
英文描述: Image Manipulation Sequencer
中文描述: 16-BIT, DSP-ADDRESS SEQUENCER, PQFP120
封裝: METRIC, QFP-120
文件頁數(shù): 4/36頁
文件大?。?/td> 188K
代理商: TMC2302AKEC
TMC2302A
PRODUCT SPECIFICATION
4
P
Figure 2. Basic two-dimensional image convolver using TMC2302A IMS with typical 8-bit data path
16
16
16
8
8
8
8
8
X
16
2 x 16
2 x 24
SOURCE
ADDRESS
DESTINATION
ADDRESS
IDAT15-0
IDAR6-0
ACC
WR
X, Y, P
Y
IDAR6-0
DATA
IN
KADR7-0, SADR7-0
SADR7-0
IDAT15-0
TMC2302A
ROW (X)
TMC2302A
ROW (Y)
SOURCE
IMAGE
BUFFER
RAM
MULTIPLIER-
ACCUMULATOR
DESTINATION
IMAGE
BUFFER
RAM
IMAGE DATA OUT
65-2302-04
IMAGE DATA IN
ADDRESS
ADDRESS
INTERPOLATION
COEFFICIENT
BUFFER RAM
TADR11-0
TADR11-0
TWR
DATA
OUT
ACC
SADR23-8
SADR23-8
INITIALIZATION
DATA
CONTROL
CLOCK
CLOCK
The TMC2302A utilizes an external multiplier-accumulator
or interpolator, connected to the system clock, to calculate
the interpolated pixel value for each color. The products of
the original source image pixel values surrounding the
remapped pixel location (interpolation kernel) and the appro-
priate weights stored in the coefficient lookup table are
summed. The resulting new interpolated image pixel value is
then stored in the corresponding (u, v, w) memory location in
the target image memory buffer. Next, the target image
address is incremented by one in the “u” direction until
UMAX is reached (end of line), when u is reset to UMIN,
and the v counter is incremented to give the first pixel loca-
tion in the next line. The process is repeated, proceeding
line-by-line through the image, until VMAX is reached. In
the case of three-dimensional images, the IMS system also
steps through each page in the image, incrementing in the
“w” direction with the completion of each image plane until
WMAX is reached, and the transformation is complete.
The Image Manipulation Sequencer can support any nearest-
neighbor, bilinear interpolation, or cubic convolution resam-
pling. Interpolation kernels of more than one pixel require an
external interpolation coefficient lookup table and multiplier-
accumulator or multiple multiplier array. One, two, and
three-pass algorithms are supported. For each output point in
a typical two-dimensional single-pass static image filter, the
TMC2302A implements a spiralling pixel resampling algo-
rithm, “walking” around the resampling neighborhood in
two dimensions and generating the appropriate coefficient
table addresses to sum up the interpolated pixel value in the
external pixel interpolator. At the end of each walk, the
TMC2302A will advance one pixel along the output scan
line and then execute the walk for that next pixel. When per-
forming multiple-pass interpolation, the TMC2302A system
proceeds along only one dimension per pass, which requires
dimensionally separable, preferably orthogonal, coefficients.
A basic, two-dimensional TMC2302A-based system is
shown in Figure 2
.
In this typical arrangement, two Image
Manipulation Sequencers process the image. The only other
components needed beyond the source and target image
buffer memories are a multiplier-accumulator or pixel inter-
polator such as the TMC2246A Image Mixer or TMC2250A
Matrix Multiplier, and the Interpolation Coefficient Lookup
Table RAM or ROM.
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PDF描述
TMC2302AKEC1 Image Manipulation Sequencer
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMC2302AKEC1 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Image Manipulation Sequencer
TMC2330A 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Coordinate Transformer 16 x 16 Bit, 40 MOPS
TMC2330AG1C 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Coordinate Transformer 16 x 16 Bit, 40 MOPS
TMC2330AG1C1 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Coordinate Transformer 16 x 16 Bit, 40 MOPS
TMC2330AH5C 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Coordinate Transformer 16 x 16 Bit, 40 MOPS