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參數(shù)資料
| 型號： | TMC2249A |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Digital Mixer 12 x 12 Bit, 60 MHz |
| 中文描述： | 數(shù)字調(diào)音臺12 × 12位，60兆赫 |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 138K |
| 代理商： | TMC2249A |
TMC2249A
PRODUCT SPECIFICATION
REV. 1.0.2 7/6/00
5
Pin Descriptions
Pin Name
Pin Number
Pin Function Description
CPGA/PPGA/
MPGA
MQFP
Power
V
DD
F3, H3, L7, C8 12, 20, 46, 102
Supply Voltage.
supply. All power and ground pins must be connected.
Ground.
The TMC2249A operates from a single +5V supply. All
power and ground pins must be connected.
The TMC2249A operates from a single +5V
GND
E3, G3, J3, L6,
H11, C7
8, 16, 24, 42,
72, 106
Clock
CLK
C3
1
System Clock.
clock input. The rising edge of clock strobes all enabled registers.
All timing specifications are referenced to the rising edge of CLK.
The TMC2249A operates from a single master
Inputs
A
11-0
N8, M8, L8,
N9, M9, N10,
L9, M10, N11,
N12, L10, M11
N7, M7, N6,
M6, N5, M5,
N4, L5, M4,
N3, M3, L4
A9, B9, A10,
C9, B10, A11,
B11, C10, A12,
B12, C11, A13
B8, A8, B7, A7,
A6, B6, C6, A5,
B5, A4, C5, B4
48, 49, 50, 51,
52, 53, 54, 55,
56, 57, 58, 59
A-D Input.
ports. A
ports is clocked in to the top of the 16-stage delay pipeline on the
next clock when enabled, "pushing" data down the register stack.
A through D are the four 12-bit registered data input
-D
0
are the LSBs (see Table 1). Data presented to the input
0
B
11-0
47, 45, 44, 43,
41, 40, 39, 38,
37, 36, 35, 34
C
11-0
101, 100, 99,
98, 97, 96, 95,
94, 93, 92, 91,
90
103, 104, 105,
107, 108, 109,
110, 111, 112
113, 114, 115
61, 62, 63, 64
D
11-0
ADEL
3-0
L11, M12,
M13, K11
M2, L3, N1, L2 32, 31, 30, 29
D11, B13,
C13, D12
A2, C4, B3, A1 117, 118, 119,
A-D Delay.
data pipe delay select word inputs. Data to be presented to the
multipliers is selected from one of sixteen stages in the input data
delay pipe registers, as indicated by the delay select word
presented to the respective input port during that clock. The
minimum delay is one clock (select word=0000), and the maximum
delay is 16 clocks (select word=1111). Following powerup these
values are indeterminate and must be initialized by the user.
Cascade Input.
CAS is the 16-bit Cascade data input port. CAS
the LSB. See Table 1.
ADEL through DDEL are the four-bit registered input
BDEL
CDEL
3-0
3-0
88, 87, 86, 85
DDEL
3-0
120
CAS
15-0
L13, K12, J11,
K13, J12, J13,
H12, H13,
G12, G11,
G13, F13, F12,
F11, E13, E12
66, 67, 68, 69,
70, 71, 73, 74,
75, 76, 77, 78,
79, 80, 81, 82
0
is
Controls
S
15-0
C1, D2, D1,
E2, E1, F2, F1,
G2, G1, H1,
H2, J1, J2, K1,
K2, L1
6, 7, 9, 10, 11,
13, 14, 15, 17,
18, 19, 21, 22,
23, 25, 26
Sum Output.
output. The output may be the most or least significant 16 bits of the
current accumulator output, as determined by SWAP. S
See Table 1.
The current 16-bit result is available at the Sum
0
is the LSB.
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PDF描述 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMC2249AG1C | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Digital Mixer 12 x 12 Bit, 60 MHz |
| TMC2249AG1C1 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Digital Mixer 12 x 12 Bit, 60 MHz |
| TMC2249AG1C2 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Digital Mixer 12 x 12 Bit, 60 MHz |
| TMC2249AH5C | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TMC2249AH5C1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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