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參數(shù)資料
| 型號： | TMC2249A |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Digital Mixer 12 x 12 Bit, 60 MHz |
| 中文描述： | 數(shù)字調(diào)音臺12 × 12位，60兆赫 |
| 文件頁數(shù)： | 10/18頁 |
| 文件大?。?/td> | 138K |
| 代理商： | TMC2249A |
PRODUCT SPECIFICATION
TMC2249A
10
REV. 1.0.2 7/6/00
Application Notes
The TMC2249A is a flexible signal and image processing building block with numerous user-selectable functions which
expand its usefulness. Table 2 clarifies the operation of the device, demonstrating the various feature available to the user and
the timing delays incurred.
Table 2. TMC2249A Operation Sequence
CASEN = 0, H=HIGH, L=LOW,
“
ms
”
indicates most significant output word (bits 23-8),
“
ls
”
indicates least significant word (bits
15-0). The appropriate enables for the indicated data are assumed, otherwise
‘
-
’
indicates that port not enabled. Note that the
output data summations including A(8)-D(8) is lost, since the output on cycle 13 is swapped to the LSW of S(12) on cycle 8.
In general, RND may be left high unless the ls output is to be used, as on line 8 above.
CLK ADEL A
11-0
BDEL B
11-0
CDEL C
11-0
1
0
A(1)
0
DDEL D
11-0
NEG1 NEG2 CAS15-0 FT
0
D(1)
L
ACC RND SWAP
S15-0
—
B(1)
0
C(1)
L
0
L
L
H
H
2
0
A(2)
0
B(2)
0
C(2)
0
D(2)
L
H
0
L
L
H
H
—
3
0
A(3)
0
B(3)
0
C(3)
0
D(3)
H
L
0
L
L
L
H
—
4
0
A(4)
0
B(4)
0
C(4)
0
D(4)
L
L
CAS(4)
L
L
L
H
—
5
0
A(5)
0
B(5)
0
C(5)
0
D(5)
L
L
0
L
L
L
H
—
6
0
A(6)
0
B(6)
0
C(6)
0
D(6)
L
L
0
L
L
H
H
(A(1)
×
B(1)+C(1)
×
D(1)+2
7
)ms
(A(2)
×
B(2)-C(2)
×
D(2)+2
7
)ms
(-A(3)
×
B(3)+C(3)
×
D(3))ms
(A(4)
×
B(4)+C(4)
×
D(4)+CAS(4))ms
(A(5)
×
B(5)+C(5)
×
D(5)+CAS(8))ms
(A(6)
×
B(6)+C(6)
×
D(6)+2
7
)ms
(A(7)
×
B(7)+C(7)
×
D(7)+S(11))ms
(S(12))
ls
(A(9)
×
B(8)+C(7)
×
D(6)+2
7
)ms
7
0
A(7)
0
B(7)
0
C(7)
0
D(7)
L
L
0
L
H
X
H
8
0
A(8)
0
B(8)
0
C(8)
0
D(8)
L
L
CAS(8)
H
L
L
L
9
0
A(9)
0
B(9)
0
C(9)
0
D(9)
L
L
0
L
L
H
H
10
11
12
13
14
Digital Filtering
The input structure of the TMC2249A demonstrates great
versatility when all four multiplier inputs and the program-
mable delay registers are utilized.
Table 3 and Table 4 illlustrate how a direct-form symmetric
FIR filter of up to 32 taps can be implemented. By utilizing
the four input delay registers as pipelined storage banks, the
user can store up to 32 coefficient-data word pairs, split into
alternate "even" and "odd" halves. Two taps of the filter are
calculated on each clock, and the user then increments/decre-
ments the delay words (ADEL-DDEL). The sums of prod-
ucts are successively added to the global sum in the internal
accumulator.
Table 3. FIR Filtering with the TMC2249A—Initial Data Loading
Even Data
A
x(31)
x(29)
x(27)
x(25)
x(23)
x(21)
x(19)
x(17)
x(15)
x(13)
x(11)
x(9)
x(7)
x(5)
x(3)
x(1)
Odd Data
C
x(30)
x(28)
x(26)
x(24)
x(22)
x(20)
x(18)
x(16)
x(14)
x(12)
x(10)
x(8)
x(6)
x(4)
x(2)
x(0)
Coefficient
B
h(0)
h(2)
h(4)
h(6)
h(8)
h(10)
h(12)
h(14)
h(15)
h(13)
h(11)
h(9)
h(7)
h(5)
h(3)
h(1)
Storage
D
h(1)
h(3)
h(5)
h(7)
h(9)
h(11)
h(13)
h(15)
h(14)
h(12)
h(10)
h(8)
h(6)
h(4)
h(2)
h(0)
Register Position (Hex)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMC2249AG1C | Digital Mixer 12 x 12 Bit, 60 MHz |
| TMC2249AG1C1 | Digital Mixer 12 x 12 Bit, 60 MHz |
| TMC2249AG1C2 | Digital Mixer 12 x 12 Bit, 60 MHz |
| TMC2249AH6C1 | Circular Connector; No. of Contacts:13; Series:MS27473; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:10; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:10-35 RoHS Compliant: No |
| TMC2249AH6C2 | JT 13C 13#22D PIN WALL RECP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMC2249AG1C | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Digital Mixer 12 x 12 Bit, 60 MHz |
| TMC2249AG1C1 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Digital Mixer 12 x 12 Bit, 60 MHz |
| TMC2249AG1C2 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Digital Mixer 12 x 12 Bit, 60 MHz |
| TMC2249AH5C | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TMC2249AH5C1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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