參數(shù)資料
型號(hào): TMC22191R0C
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 顏色信號(hào)轉(zhuǎn)換
英文描述: Digital Video Encoders/Layering Engine
中文描述: COLOR SIGNAL ENCODER, PQCC84
封裝: PLASTIC, LCC-84
文件頁數(shù): 12/60頁
文件大?。?/td> 293K
代理商: TMC22191R0C
TMC22091/TMC22191
PRODUCT SPECIFICATION
12
07
7-0
FKEY
Red/blue/C
R
data key
value
Reserved
08-0D
Misc. Control Register
0E
7
EFEN
Register 0E and 0F
enable
COMPOSITE D/A
disable
LUMA/CHROMA D/A
disable
Luminance processing
enabled
Luminance ratio select
Luminance pass
threshold select
EH/SL offset select
NTSC/PAL Color Bars
0E
6
COMPD/A
0E
5
SVIDD/A
0E
4
FKREN
0E
0E
3
2
RATIO
TFLK
0E
0E
Standards Control Register
0F
7
EFEN
1
0
T512
CB100
Same as Reg 0E bit 7
but read-only
625/525 line per frame
select
Phase alternate line
select
7.5 IRE Pedestal Enable
Luminance gain settings
Chrominance gain
settings
0F
6
SIX25
0F
5
PALID
0F
0F
0F
4
3-2
1-0
SETUP
YGAIN
CGAIN
Timing Registers
10
7-0
SY
Horizontal sync tip
length
Breezeway length
Burst length
Color back porch length
Extended color back
porch 8 LSB
Active video 8 LSB
Active video start 8 LSB
Active video end 8 LSB
Extended color back
porch 2 MSB
Active video 2 MSB
Active video start 2 MSB
Active video end 2 MSB
11
12
13
14
7-0
7-0
7-0
7-0
BR
BU
CBP
XBP
15
16
17
18
7-0
7-0
7-0
7-6
VA
VC
VB
XBP
18
18
18
5-4
3-2
1-0
VA
VC
VB
Table 3. Control Register Map
(continued)
Reg
Bit
Name
Function
Notes:
1. Functions are listed in the order used for reading and
writing.
2. For each register listed above, all bits not listed are
reserved and should be set to zero to ensure proper
operation.
3. The meaning of Register 04 (Key Control Register/Layer-
ing Control Register) is determined by Format Control
Register bit 6 (TMC22191).
19
1A
7-0
7-0
FP
EL
Front porch length
Equalization pulse LOW
length
Equalization pulse HIGH
length
Vertical sync LOW
length
Vertical sync HIGH
length
Color bar length
Field identification
Line type identification
1B
7-0
EH
1C
7-0
SL
1D
7-0
SH
1E
1F
1F
Subcarrier Registers
20
7-0
7-0
7-5
4-0
CBL
FIELD
LTYPE
FREQL
Subcarrier frequency 4th
byte (LSBs)
Subcarrier frequency 3rd
byte
Subcarrier frequency
2nd byte
Subcarrier frequency 1st
byte (MSBs)
Video phase offset LSBs
Video phase offset
MSBs
Burst phase offset LSBs
Burst phase offset MSBs
Reserved
21
7-0
FREQ3
22
7-0
FREQ2
23
7-0
FREQM
24
25
7-0
7-0
SYSPHL
SYSPHM
26
27
7-0
7-0
BURPHL
BURPHM
28-3F
Test I/O Register
40
7-0
Mask Register
50
7-0
Y-Component Register
60
7-0
TESTDAT
Test data input/output
MASK
Mask register
Y
Y-component input/
output
Table 3. Control Register Map
(continued)
Reg
Bit
Name
Function
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