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| 型號(hào)： | TM248NBK36B-60 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | CAP 68PF 100V CERAMIC MONO 5% |
| 中文描述： | 動(dòng)態(tài)隨機(jī)存儲(chǔ)器模塊 |
| 文件頁數(shù)： | 9/11頁 |
| 文件大?。?/td> | 156K |
| 代理商： | TM248NBK36B-60 |
TM124MBK36B, TM124MBK36R 1048576 BY 36-BIT
TM248NBK36B, TM248NBK36R 2097152 BY 36-BIT
DYNAMIC RAMMODULE
SMMS137E – JANUARY 1991 – REVISEDJUNE 1995
9
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature
PARAMETER
’124MBK36B-60
’248NBK36B-60
’124MBK36B-70
’248NBK36B-70
’124MBK36B-80
’248NBK36B-80
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
tCAC
tAA
tRAC
tCPA
tCLZ
tOFF
NOTE 6: tOFF is specified when the output is no longer driven.
Access time from CAS low
15
18
20
ns
Access time from column address
30
35
40
ns
Access time from RAS low
60
70
80
ns
Access time from column precharge
35
40
45
ns
CAS to output in low impedance
0
0
0
ns
Output disable time after CAS high (see Note 6)
0
15
0
18
0
20
ns
timing requirements over recommended ranges of supply voltage and operating free-air
temperature
’124MBK36B-60
’248NBK36B-60
’124MBK36B-70
’248NBK36B-70
’124MBK36B-80
’248NBK36B-80
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
tRC
tRWC
tPC
tRASP
tRAS
tCAS
tCP
tRP
tWP
tASC
tASR
tDS
tRCS
tCWL
tRWL
tWCS
tWSR
NOTES:
Cycle time, random read or write (see Note 7)
110
130
150
ns
Cycle time, read write
130
153
175
ns
Cycle time, page-mode read or write (see Note 8)
40
45
50
ns
Pulse duration, page mode, RAS low
60
100 000
70
100 000
80
100 000
ns
Pulse duration, nonpage mode, RAS low
60
10 000
70
10 000
80
10 000
ns
Pulse duration, CAS low
15
10 000
18
10 000
20
10 000
ns
Pulse duration, CAS high
10
10
10
ns
Pulse duration, RAS high (precharge)
40
50
60
ns
Pulse duration, write
15
15
15
ns
Setup time, column address before CAS low
0
0
0
ns
Setup time, row address before RAS low
0
0
0
ns
Setup time, data
0
0
0
ns
Setup time, read before CAS low
0
0
0
ns
Setup time, W low before CAS high
15
18
20
ns
Setup time, W low before RAS high
15
18
20
ns
Setup time, W low before CAS low
0
0
0
ns
Setup time, W high (see Note 9)
10
10
10
ns
7. All cycles assume tT = 5 ns.
8. To assure tPC min, tASC should be
≥
5 ns.
9. CBR refresh only
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相關(guān)代理商/技術(shù)參數(shù) |
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| TM248NBK36B-70 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DYNAMIC RAM MODULE |
| TM248NBK36B-80 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DYNAMIC RAM MODULE |
| TM248NBK36E | 制造商:TI 制造商全稱:Texas Instruments 功能描述:36-BIT DYNAMIC RAM MODULE |
| TM248NBK36R | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DYNAMIC RAM MODULE |
| TM248NBK36R-80 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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