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參數(shù)資料
| 型號(hào)： | TLV320DAC32IRHBT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, DAC WITH PROGRAMMABLE PLL, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁數(shù)： | 27/69頁 |
| 文件大?。?/td> | 1242K |
| 代理商： | TLV320DAC32IRHBT |
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Volume0dBto
+9dB,mute
VCM
Volume0dBto
+9dB,mute
VCM
HPLOUT
HPROUT
MIX
VOL 0dBto-78dB,mute
MIX
VOL 0dBto-78dB,mute
MIX
VOL 0dBto-78dB,mute
MIX
VOL 0dBto-78dB,mute
DAC_L
DAC_R
MICL/LINEL
MICR/LINER
DAC_L
DAC_R
MICL/LINEL
MICR/LINER
DAC_L
DAC_R
MICL/LINEL
MICR/LINER
DAC_L
DAC_R
MICL/LINEL
MICR/LINER
LeftDAC-DirectPath
RightDAC-DirectPath
Volume0dB
to+9dB,
mute
HPRCOM
Volume0dBto
+9dB,mute
HPLCOM
www.ti.com........................................................................................................................................ SLAS506B – NOVEMBER 2006 – REVISED DECEMBER 2008
Figure 34. Architecture of the output stage leading to the high power output drivers
The high power output drivers include additional circuitry to avoid artifacts on the audio output during power-on
and power-off transient conditions. The user should first program the type of output configuration being used in
Page-0/Reg-14, to allow the device to select the optimal power-up scheme to avoid output artifacts. The
power-up delay time for the high power output drivers is also programmable over a wide range of time delays,
from instantaneous up to 4-sec, using Page-0/Reg-42.
When these output drivers are powered down, they can be placed into a variety of output conditions based on
register programming. If lowest power operation is desired, then the outputs can be placed into a tri-state
condition, and all power to the output stage is removed. However, this generally results in the output nodes
drifting to rest near the upper or lower analog supply voltage, due to small leakage currents at the pins. This then
results in a longer delay requirement to avoid output artifacts (pops and clicks) during driver power-on. In order to
reduce this required power-on delay, the TLV320DAC32 includes an option for the output pins of the drivers to
be weakly driven to the VCM level they would normally rest at when powered with no signal applied. This output
VCM level is determined by an internal bandgap voltage reference, and thus results in extra power dissipation
when the drivers are in power down. However, this option provides the fastest method for transitioning the drivers
from power down to full power operation without any output artifact introduced.
Copyright 2006–2008, Texas Instruments Incorporated
33
Product Folder Link(s): TLV320DAC32
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