參數(shù)資料
型號： TLV320AIC3120IRHBT
廠商： TEXAS INSTRUMENTS INC
元件分類： 音頻／視頻放大
英文描述： AUDIO AMPLIFIER, PQCC32
封裝： 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁數(shù)： 50/150頁
文件大小： 1507K
代理商： TLV320AIC3120IRHBT
www.ti.com
SLAS653 – FEBRUARY 2010
Table 6-20. Page 15 Registers (continued)
REGISTER
RESET VALUE
REGISTER NAME
NUMBER
119 (0x77)
0000 0000
Coefficient C251(7:0) of DAC miniDSP (DAC buffer B)
120 (0x78)
0000 0000
Coefficient C252(15:8) of DAC miniDSP (DAC buffer B)
121 (0x79)
0000 0000
Coefficient C252(7:0) of DAC miniDSP (DAC buffer B)
122 (0x7A)
0000 0000
Coefficient C253(15:8) of DAC miniDSP (DAC buffer B)
123 (0x7B)
0000 0000
Coefficient C253(7:0) of DAC miniDSP (DAC buffer B)
124 (0x7C)
0000 0000
Coefficient C254(15:8) of DAC miniDSP (DAC buffer B)
125 (0x7D)
0000 0000
Coefficient C254(7:0) of DAC miniDSP (DAC buffer B)
126 (0x7E)
0000 0000
Coefficient C255(15:8) of DAC miniDSP (DAC buffer B)
127 (0x7F)
0000 0000
Coefficient C255(7:0) of DAC miniDSP (DAC buffer B)
6.15 Control Registers, Page 32: ADC DSP Engine Instruction RAM (0:31)
Page 32 / Register 0 (0x00): Page Control Register
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
0000 0000
0000 0000: Page 0 selected
0000 0001: Page 1 selected
...
1111 1110: Page 254 selected
1111 1111: Page 255 selected
Page 32 / Register 1 (0x01): Reserved
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
XXXX XXXX
Reserved. Write only the default value to this register
Page 32 / Register 2 (0x02): Inst_0(19:16)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D4
R/W
XXXX
Reserved
D3–D0
R/W
XXXX
Instruction Inst_0(19:16) of ADC miniDSP
Page 32 / Register 3 (0x03): Inst_0(15:8)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
XXXX XXXX
Instruction Inst_0(15:8) of ADC miniDSP
Page 32 / Register 4 (0x04): Inst_0(7:0)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
XXXX XXXX
Instruction Inst_0(7:0) of ADC miniDSP
6.15.1 Page 32 / Register 5 (0x05) Through Page 32 / Register 97 (0x61)
The remaining unreserved registers on page 32 are arranged in groups of three, with each group
containing the bits of one instruction. The arrangement is the same as that of registers 2–4 for instruction
0. Registers 5–7, 8–10, 11–13, ..., 95–97 contain instructions 1, 2, 3, ..., 31, respectively.
Page 32 / Register 98 (0x62) Through Page 32 / Register 127 (0x7F): Reserved
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
XXXX XXXX
Reserved. Write only the default value to this register.
Copyright 2010, Texas Instruments Incorporated
REGISTER MAP
143
Product Folder Link(s): TLV320AIC3120
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