參數(shù)資料
型號: TLV320AIC29_07
廠商: Texas Instruments, Inc.
元件分類: Codec
英文描述: STWREO AUDIO CODEC WITH INTERGRATED HEADPHONE AND SPEAKER AMPLIFIERS
中文描述: STWREO音頻編解碼器集成耳機(jī)和音箱放大器
文件頁數(shù): 14/94頁
文件大小: 1073K
代理商: TLV320AIC29_07
TLV320AIC29
SLAS494A DECEMBER 2005 REVISED JANUARY 2006
www.ti.com
21
D Left Justified Mode
In left-justified mode, the MSB of right channel is valid on the rising edge of BCLK, following the falling edge on
WCLK. Similarly the MSB of left channel is valid on the rising edge of BCLK following the rising edge of
WCLK.
BCLK
WCLK
SDIN/
SDOUT
n
n1
1
0
n
n1
1
0
1/fs
LSB
MSB
Left Channel
Right Channel
n
n1
n2
2
n2
2
Figure 16. Timing Diagram for Left-Justified Mode
D I2S Mode
In I2S mode, the MSB of left channel is valid on the second rising edge of BCLK, after the falling edge on
WCLK. Similarly the MSB of right channel is valid on the second rising edge of BCLK, after the rising edge of
WCLK.
BCLK
WCLK
SDIN/
SDOUT
n
n1
1
0
n
n1
1
0
1/fs
LSB
MSB
Left Channel
Right Channel
n
1 clock before MSB
n2
2
n2
2
Figure 17. Timing Diagram for I2S Mode
D DSP Mode
In DSP mode, the falling edge of WCLK starts the data transfer with the left channel data first and immediately
followed by the right channel data. Each data bit is valid on the falling edge of BCLK.
BCLK
WCLK
SDIN/
SDOUT
n
n1
1
0
n
n1
1
0
1/fs
LSB
MSB
Left Channel
Right Channel
n
n1
1
0
MSB
LSB
n2
2
n2
2
n2
MSB
LSB
Figure 18. Timing Diagram for DSP Mode
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