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參數(shù)資料
| 型號： | TLE7824G |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO28 |
| 封裝： | GREEN, PLASTIC,SOP-28 |
| 文件頁數(shù)： | 52/53頁 |
| 文件大?。?/td> | 900K |
| 代理商： | TLE7824G |
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TLE7824G
Pin Definitions and Functions
Data Sheet
8
Rev. 3.01, 2008-04-15
4LIN
LIN Bus; Bus Line for the LIN interface, according to ISO 9141 and LIN specification
1.3 and 2.0
24
SUPPLY
Supply Output; e.g. for Hall Sensor; controlled via SPI
5LS2
Low Side Switch 2 Output; controlled via SPI
6LS1
Low Side Switch 1 Output; controlled via SPI
9P0.3
General Purpose I/O with PWM Functionality
(alternate function: SCK, see XC885 data sheet)
10
P0.4
General Purpose I/O with Capture and PWM Functionality
(alternate function: MTSR, see XC885 data sheet)
11
P0.5
General Purpose I/O with PWM Functionality
(alternate function: MRST and EXINT0 ,see XC885 data sheet)
13
V
DDC
Voltage Regulator Output for
μController Core (2.5 V); for connection of block
capacitor to GND; not to be used for external loads
14
TMS
Test Mode Select (JTAG)
15
P0.0
[TCK_0]
General Purpose I/O; see XC885 data sheet
(alternate function: JTAG Clock Input)
16
P0.2
[TDO_0]
General Purpose I/O; see XC885 data sheet
(alternate function: JTAG Serial Data Output; RxD1)
17
P0.1
[TDI_0]
General Purpose I/O; see XC885 data sheet
(alternate function: JTAG Serial Data Input; TxD1)
18
P2.0
General Purpose Input (digital/analog) with Capture Functionality; e.g. for Hall
Sensor (alternate function: EXINT1)
19
P2.1
General Purpose Input (digital/analog) with Capture Functionality; e.g. for Hall
Sensor (alternate function: EXINT2)
20
V
DDP
Voltage Supply Input for
μController I/Os (5 V); to be connected with V
CC pin
–RxD
LIN Transceiver Data Output; according to the ISO 9141 and LIN specification 1.3
and 2.0; LOW in dominant state; connected to C General Purpose Input P1.0
–TxD
LIN Transceiver Data Input; according to ISO 9141 and LIN specification 1.3 and
2.0; TxD has an internal pull-up; connected to C General Purpose Input P1.1
–DI
SPI Data Input; receives serial data from the control device; serial data transmitted
to DI is a 16-bit control word with the Least Significant Bit (LSB) transferred first: the
input has a pull-down and requires CMOS logic level inputs; DI will accept data on
the falling edge of CLK-signal; connected to C General Purpose Input P1.3
–DO
SPI Data Output; this tri-state output transfers diagnosis data to the control device;
the output will remain in the high-impedance state unless the device is selected by a
low on Chip-Select-Not (CSN); connected to C General Purpose Input P1.4
(EXTINT0_1)
–CLK
SPI Clock Input; clock input for shift register; CLK has an internal pull-down and
requires CMOS logic level inputs; connected to C General Purpose Input P1.2
–CSN
SPI Chip Select Not Input; CSN is an active low input; serial communication is
enabled by pulling the CSN terminal low; CSN input should only be transitioned when
CLK is low; CSN has an internal pull-up and requires CMOS logic level inputs;
connected to C General Purpose Input P1.5
–
V
AREF
Voltage Reference for ADC
Pin No. Symbol
Function
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