參數(shù)資料
型號: TLE6263
廠商: INFINEON TECHNOLOGIES AG
英文描述: LS CAN, LDO and HS Switch
中文描述: 儲蓄的CAN,開關(guān)穩(wěn)壓器和HS
文件頁數(shù): 16/40頁
文件大小: 811K
代理商: TLE6263
Final Datasheet TLE 6263
Version 2.08
16
2004-06-07
6.11
Wake-Up Inputs WK1, WK2
In addition to a wake-up from sleep mode via the bus lines CANH or CANL it is also
possible to wake-up the TLE6263 from low power mode via the wake-up inputs WK1 and
WK2. The wake-up inputs are sensitive to a transition of the voltage level, either from
high to low or the other way round. They are active in all operation modes. In the normal
mode the current logic level at WK1/2 is monitored via the SPI (see
table 4 and 6
).
A positive or negative voltage edge at WK1/2 in V
bat
-stand-by mode or sleep mode
immediately results in setting the output RxD low to signal a wake-up. After a wake-up
via WK1/2 the transmission of the SPI diagnosis word in the V
bat
-stand-by mode shows
the logic level that has caused the wake-up. To get the current voltage levels at WK1/2
in the V
bat
-stand-by mode the internal wake flip-flop has to be reseted by the IBIT1 for
each transmission. As long as IBIT1 is set high or the internal wake flip-flop is reseted
respectively, in the V
bat
-stand-by mode the RxD output is blocked to signal a new wake-
up event via the CAN-bus or the wake-up inputs.
Further to the continues sensing at the wake-up inputs a cyclic sense feature is possible.
When the OUTHS cyclic sense feature is selected via the SPI IBIT 4 the high side switch
as well as the WK1/2 inputs are periodically activated by the TLE6263 in the sleep and
V
bat
-stand-by mode.
When switching the TLE6263 into sleep mode (cyclic sense feature activated) the
voltage level at the wake-inputs is sensed 2 times to initialize the reference voltage.
Should this initialisation fail (2 samples are unequal) the device is automatically set in
V
bat
-stand-by mode and the initialisation error is shown on the OBIT 5. To enter the sleep
mode now directly from the V
bat
-stand-by mode, the internal wake flip-flop has to be
reseted by the IBIT 1.
6.12
Interrupt output INT
Like the reset output, the interrupt output is a low active output. It is used to monitor low
voltage conditions at the sense input in normal mode and stand-by mode (see
table 8
).
In the receive-only mode the V
INT
-fail flag and V
CC
supervisor are monitored.
6.13
High Side Switch
The high side output OUTHS is able to switch loads up to 150 mA. Its on-resistance is
1.0
typ. @ 25°C. This switch is controlled via the SPI input bits 4 and 5. In normal
mode, receive-only mode and V
bat
-stand-by mode the high side output is switched on
and off, respectively via the SPI input bit 5.
To supply external wake-up circuits in sleep mode and V
bat
-stand-by mode the output
OUTHS can be periodically switched on by the TLE6263 itself. In order to activate this
cyclic sense feature the SPI IBIT 4 has to be set high. The auto-timing period then is typ.
65 ms, the on-time is typ. 1 ms. Should there be any over-current condition at the switch
in the sleep mode (cyclic sense activated) or V
bat
-stand-by mode a wake-up is flagged
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