
TLE 6208-3 G
Data Sheet
3
2001-05-10
1.3
Pin No.
1
Pin Definitions and Functions
Symbol
Function
GND
Ground;
Reference potential; internal connection to pin 7, 8 and 14;
cooling tab; to reduce thermal resistance place cooling areas on PCB
close to these pins.
2
OUT3
Halfbridge-Output 3;
Internally contected to Highside-Switch 3 and Lowside-Switch 3. The
HS-Switch is a Power-MOS open drain with internal reverse diode;
The LS-Switch is a Power-MOS open source with internal reverse
diode; no internal clamp diode or active zenering;
short circuit protected and open load controlled.
3
V
S
Power Supply;
needs a blocking capacitor as close as possible to GND Value: 22
μ
F
electrolytic in parallel to 220 nF ceramic.
Serial Data Input;
receives serial data from the control device; serial
data transmitted to DI is an 16bit control word with the Least
Significant Bit (LSB) being transferred first: the input has an active
pull down and requires CMOS logic level inputs;
DI will accept data on the falling edge of CLK-signal;
see
Table Input Data Protocol
.
Chip-Select-Not Input;
CSN is an active low input; serial
communication is enabled by pulling the CSN terminal low; CSN
input should only be transitioned when CLK is low; CSN has an
internal active pull up and requires CMOS logic level inputs.
5
DI
4
CSN
6
CLK
Serial Clock Input;
clocks the shiftregister; CLK has an internal
active pull down and requires CMOS logic level inputs.
Ground;
see pin 1.
Serial-Data-Output;
this 3-state output transfers diagnosis data to
the control device; the output will remain 3-stated unless the device
is selected by a low on Chip-Select-Not (CSN);
see
Table Diagnosis Data Protocol
.
Inhibit Input;
has an internal pull down;
device is switched in standby condition by pulling the INH terminal
low.
7, 8, 14
GND
9
DO
10
INH
11
V
CC
Logic Supply Voltage;
needs a blocking capacitor as close as possible to GND;
Value: 10
μ
F electrolytic in parallel to 220 nF ceramic.
Halfbridge-Output 2;
see pin 2.
Halfbridge-Output 1;
see pin 2.
12
OUT2
13
OUT1