參數(shù)資料
型號: TLC5941RHB
廠商: Texas Instruments, Inc.
英文描述: 16-CHANNEL LED DRIVER WITH DOT CORRECTION AND GRAYSCALE PWM CONTROL
中文描述: 16-CHANNEL的LED驅(qū)動器,帶有點校正與灰度PWM控制
文件頁數(shù): 16/23頁
文件大?。?/td> 513K
代理商: TLC5941RHB
www.ti.com
GRAYSCALE PWM OPERATION
The grayscale PWM cycle starts with the falling edge of BLANK. The first GSCLK pulse after BLANK increases
the grayscale counter by one and switches on all OUTn with grayscale value not zero. Each following rising edge
of GSCLK increases the grayscale counter by one. The TLC5941 compares the grayscale value of each output
OUTn with the grayscale counter value. All OUTn with grayscale values equal to counter values are switched off.
A BLANK=H signal after 4096 GSCLK pulses resets the grayscale counter to zero and completes the grayscale
PWM cycle (see
Figure 12
).
GSCLK
BLANK
GS PWM
Cycle n
1
2
3
1
GS PWM
Cycle n+1
OUT0
(Current)
OUT1
(Current)
OUT15
(Current)
XERR
n x t
d
t
pd1
t
pd1
+ t
d
t
pd1
+ 15 x t
d
t
pd3
t
pd4
t
wh1
t
wl1
t
wl1
t
pd3
4096
t
h4
t
wh3
t
pd3
+ n x t
d
t
su4
SERIAL DATA TRANSFER RATE
Figure 13
shows a cascading connection of
n
TLC5941 devices connected to a controller, building a basic
module of an LED display system. The maximum number of cascading TLC5941 devices depends on the
application system and is in the range of 40 devices.
Equation 5
calculates the minimum frequency needed:
f(GSCLK)
4096
f(update)
f(SCLK)
193
f(update)
n
(5)
TLC5941
SLVS589–JULY 2005
Figure 12. Grayscale PWM Cycle Timing Chart
where:
f
(GSCLK)
: minimum frequency needed for GSCLK
f
(SCLK)
: minimum frequency needed for SCLK and SIN
f
(update)
: update rate of whole cascading system
n: number cascaded of TLC5941 device
16
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